:orphan: .. title:: CAVS_TIMER .. option:: CONFIG_CAVS_TIMER *CAVS DSP Wall Clock Timer on Intel SoC* Type: ``bool`` Help ==== The DSP wall clock timer is a timer driven directly by external oscillator and is external to the CPU core(s). It is not as fast as the internal core clock, but provides a common and synchronized counter for all CPU cores (which is useful for SMP). Direct dependencies =================== \ :option:`SOC_SERIES_INTEL_CAVS_V15 ` || \ :option:`SOC_SERIES_INTEL_CAVS_V18 ` || \ :option:`SOC_SERIES_INTEL_CAVS_V20 ` || \ :option:`SOC_SERIES_INTEL_CAVS_V25 ` || (\ :option:`SMP ` && \ :option:`SOC_INTEL_S1000 `) || \ :option:`CAVS_ICTL ` *(Includes any dependencies from ifs and menus.)* Defaults ======== - y - y - y - y - y Symbols selected by this symbol =============================== - \ :option:`TICKLESS_CAPABLE ` Kconfig definitions =================== .. highlight:: kconfig At ``soc/xtensa/intel_adsp/cavs_v15/Kconfig.defconfig.series:24`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:19`` → ``/home/runner/work/bridle/bridle/workspace/build/Kconfig/Kconfig.soc.defconfig:1`` → ``soc/xtensa/intel_adsp/Kconfig.defconfig:6`` Menu path: (Top) .. parsed-literal:: config CAVS_TIMER bool default y depends on \ :option:`SOC_SERIES_INTEL_CAVS_V15 ` ---- At ``soc/xtensa/intel_adsp/cavs_v18/Kconfig.defconfig.series:24`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:19`` → ``/home/runner/work/bridle/bridle/workspace/build/Kconfig/Kconfig.soc.defconfig:1`` → ``soc/xtensa/intel_adsp/Kconfig.defconfig:6`` Menu path: (Top) .. parsed-literal:: config CAVS_TIMER bool default y depends on \ :option:`SOC_SERIES_INTEL_CAVS_V18 ` ---- At ``soc/xtensa/intel_adsp/cavs_v20/Kconfig.defconfig.series:24`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:19`` → ``/home/runner/work/bridle/bridle/workspace/build/Kconfig/Kconfig.soc.defconfig:1`` → ``soc/xtensa/intel_adsp/Kconfig.defconfig:6`` Menu path: (Top) .. parsed-literal:: config CAVS_TIMER bool default y depends on \ :option:`SOC_SERIES_INTEL_CAVS_V20 ` ---- At ``soc/xtensa/intel_adsp/cavs_v25/Kconfig.defconfig.series:24`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:19`` → ``/home/runner/work/bridle/bridle/workspace/build/Kconfig/Kconfig.soc.defconfig:1`` → ``soc/xtensa/intel_adsp/Kconfig.defconfig:6`` Menu path: (Top) .. parsed-literal:: config CAVS_TIMER bool default y depends on \ :option:`SOC_SERIES_INTEL_CAVS_V25 ` ---- At ``soc/xtensa/intel_s1000/Kconfig.defconfig:42`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:19`` → ``/home/runner/work/bridle/bridle/workspace/build/Kconfig/Kconfig.soc.defconfig:1`` Menu path: (Top) .. parsed-literal:: config CAVS_TIMER bool default y depends on \ :option:`SMP ` && \ :option:`SOC_INTEL_S1000 ` ---- At ``drivers/timer/Kconfig:282`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:32`` → ``drivers/Kconfig:28`` Menu path: (Top) → Device Drivers → Timer Drivers .. parsed-literal:: config CAVS_TIMER bool "CAVS DSP Wall Clock Timer on Intel SoC" select \ :option:`TICKLESS_CAPABLE ` depends on \ :option:`CAVS_ICTL ` help The DSP wall clock timer is a timer driven directly by external oscillator and is external to the CPU core(s). It is not as fast as the internal core clock, but provides a common and synchronized counter for all CPU cores (which is useful for SMP). *(The 'depends on' condition includes propagated dependencies from ifs and menus.)*