:orphan:

.. title:: CLOCK_STM32_PLL_SRC_PLL2

.. option:: CONFIG_CLOCK_STM32_PLL_SRC_PLL2

*PLL2*

Type: ``bool``

Help
====

Use PLL2 as source of main PLL. This is equivalent of defining
PLL2 as source PREDIV1SCR. If not selected, default source is HSE.

Direct dependencies
===================

\ :option:`SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE <CONFIG_SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE>` && \ :ref:`<choice: STM32 PLL Clock Source> <choice_177>`

*(Includes any dependencies from ifs and menus.)*

Kconfig definition
==================

.. highlight:: kconfig

At ``drivers/clock_control/Kconfig.stm32:112``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:32`` → ``drivers/Kconfig:54`` → ``drivers/clock_control/Kconfig:25``

Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control → STM32 PLL Clock Source

.. parsed-literal::

    config CLOCK_STM32_PLL_SRC_PLL2
    	bool "PLL2"
    	depends on \ :option:`SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE <CONFIG_SOC_STM32F10X_CONNECTIVITY_LINE_DEVICE>` && \ :ref:`<choice: STM32 PLL Clock Source> <choice_177>`
    	help
    	  Use PLL2 as source of main PLL. This is equivalent of defining
    	  PLL2 as source PREDIV1SCR. If not selected, default source is HSE.

*(The 'depends on' condition includes propagated dependencies from ifs and menus.)*