:orphan:

.. title:: NRF5340_CPUAPP_ERRATUM19

.. option:: CONFIG_NRF5340_CPUAPP_ERRATUM19

*Include workarounds for Erratum 19*

Type: ``bool``

Help
====

This anomaly applies to IC Rev. Engineering A, build codes QKAA-AB0.
This config MUST be enabled if there is a chance the code will be run
on nRF5340 Engineering A. Enabling this config is safe on other
nRF5340 variants, but might increase flash size.
The workaround involves adding run-time checks when using the SPU,
and aligning regions on 32 KiB instead of 16 KiB if they are to be
locked with the SPU.
More info: https://infocenter.nordicsemi.com/topic/errata_nRF5340_EngA/ERR/nRF5340/EngineeringA/latest/anomaly_340_19.html?cp=3_0_1_0_1_15

Direct dependencies
===================

!\ :option:`TRUSTED_EXECUTION_NONSECURE <CONFIG_TRUSTED_EXECUTION_NONSECURE>` && \ :option:`SOC_NRF5340_CPUAPP_QKAA <CONFIG_SOC_NRF5340_CPUAPP_QKAA>` && \ :option:`SOC_SERIES_NRF53X <CONFIG_SOC_SERIES_NRF53X>` && \ :option:`SOC_FAMILY_NRF <CONFIG_SOC_FAMILY_NRF>`

*(Includes any dependencies from ifs and menus.)*

Defaults
========

No defaults. Implicitly defaults to ``n``.

Kconfig definition
==================

.. highlight:: kconfig

At ``soc/arm/nordic_nrf/nrf53/Kconfig.defconfig.nrf5340_CPUAPP_QKAA:14``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:19`` → ``/home/runner/work/bridle/bridle/workspace/build/Kconfig/Kconfig.soc.defconfig:1`` → ``soc/arm/nordic_nrf/Kconfig.defconfig:8`` → ``soc/arm/nordic_nrf/nrf53/Kconfig.defconfig.series:8``

Menu path: (Top)

.. parsed-literal::

    config NRF5340_CPUAPP_ERRATUM19
    	bool "Include workarounds for Erratum 19"
    	depends on !\ :option:`TRUSTED_EXECUTION_NONSECURE <CONFIG_TRUSTED_EXECUTION_NONSECURE>` && \ :option:`SOC_NRF5340_CPUAPP_QKAA <CONFIG_SOC_NRF5340_CPUAPP_QKAA>` && \ :option:`SOC_SERIES_NRF53X <CONFIG_SOC_SERIES_NRF53X>` && \ :option:`SOC_FAMILY_NRF <CONFIG_SOC_FAMILY_NRF>`
    	help
    	  This anomaly applies to IC Rev. Engineering A, build codes QKAA-AB0.
    	  This config MUST be enabled if there is a chance the code will be run
    	  on nRF5340 Engineering A. Enabling this config is safe on other
    	  nRF5340 variants, but might increase flash size.
    	  The workaround involves adding run-time checks when using the SPU,
    	  and aligning regions on 32 KiB instead of 16 KiB if they are to be
    	  locked with the SPU.
    	  More info: https://infocenter.nordicsemi.com/topic/errata_nRF5340_EngA/ERR/nRF5340/EngineeringA/latest/anomaly_340_19.html?cp=3_0_1_0_1_15

*(The 'depends on' condition includes propagated dependencies from ifs and menus.)*