:orphan:

.. title:: CPU_CORTEX_M_HAS_DWT

.. option:: CONFIG_CPU_CORTEX_M_HAS_DWT

*(No prompt -- not directly user assignable.)*

Type: ``bool``

Help
====

This option signifies that the CPU implements the Data Watchpoint and
Trace (DWT) unit specified by the ARMv7-M and above.

While ARMv6-M does define a "DWT" unit, this is significantly different
from the DWT specified by the ARMv7-M and above in terms of both feature
set and register mappings.

Direct dependencies
===================

!\ :option:`CPU_CORTEX_M0 <CONFIG_CPU_CORTEX_M0>` && !\ :option:`CPU_CORTEX_M0PLUS <CONFIG_CPU_CORTEX_M0PLUS>` && !\ :option:`CPU_CORTEX_M1 <CONFIG_CPU_CORTEX_M1>` && \ :option:`CPU_CORTEX_M <CONFIG_CPU_CORTEX_M>` && !\ :option:`ARM64 <CONFIG_ARM64>` && \ :option:`ARM <CONFIG_ARM>`

*(Includes any dependencies from ifs and menus.)*

Defaults
========

No defaults. Implicitly defaults to ``n``.

Symbols that select this symbol
===============================

- \ :option:`SOC_SERIES_BEETLE <CONFIG_SOC_SERIES_BEETLE>`
- \ :option:`SOC_SERIES_SAM3X <CONFIG_SOC_SERIES_SAM3X>`
- \ :option:`SOC_SERIES_SAM4E <CONFIG_SOC_SERIES_SAM4E>`
- \ :option:`SOC_SERIES_SAM4L <CONFIG_SOC_SERIES_SAM4L>`
- \ :option:`SOC_SERIES_SAM4S <CONFIG_SOC_SERIES_SAM4S>`
- \ :option:`SOC_SERIES_SAME70 <CONFIG_SOC_SERIES_SAME70>`
- \ :option:`SOC_SERIES_SAMV71 <CONFIG_SOC_SERIES_SAMV71>`
- \ :option:`SOC_SERIES_SAMD51 <CONFIG_SOC_SERIES_SAMD51>`
- \ :option:`SOC_SERIES_SAME51 <CONFIG_SOC_SERIES_SAME51>`
- \ :option:`SOC_SERIES_SAME53 <CONFIG_SOC_SERIES_SAME53>`
- \ :option:`SOC_SERIES_SAME54 <CONFIG_SOC_SERIES_SAME54>`
- \ :option:`SOC_SERIES_XMC_4XXX <CONFIG_SOC_SERIES_XMC_4XXX>`
- \ :option:`SOC_SERIES_MEC1501X <CONFIG_SOC_SERIES_MEC1501X>`
- \ :option:`SOC_SERIES_MEC1701X <CONFIG_SOC_SERIES_MEC1701X>`
- \ :option:`SOC_SERIES_NRF53X <CONFIG_SOC_SERIES_NRF53X>`
- \ :option:`SOC_SERIES_NRF91X <CONFIG_SOC_SERIES_NRF91X>`
- \ :option:`SOC_SERIES_M48X <CONFIG_SOC_SERIES_M48X>`
- \ :option:`SOC_SERIES_NPCX7 <CONFIG_SOC_SERIES_NPCX7>`
- \ :option:`SOC_SERIES_IMX_6X_M4 <CONFIG_SOC_SERIES_IMX_6X_M4>`
- \ :option:`SOC_SERIES_IMX7_M4 <CONFIG_SOC_SERIES_IMX7_M4>`
- \ :option:`SOC_SERIES_IMX_RT <CONFIG_SOC_SERIES_IMX_RT>`
- \ :option:`SOC_SERIES_IMX_RT6XX <CONFIG_SOC_SERIES_IMX_RT6XX>`
- \ :option:`SOC_SERIES_KINETIS_K2X <CONFIG_SOC_SERIES_KINETIS_K2X>`
- \ :option:`SOC_SERIES_KINETIS_K6X <CONFIG_SOC_SERIES_KINETIS_K6X>`
- \ :option:`SOC_SERIES_KINETIS_K8X <CONFIG_SOC_SERIES_KINETIS_K8X>`
- \ :option:`SOC_SERIES_KINETIS_KE1XF <CONFIG_SOC_SERIES_KINETIS_KE1XF>`
- \ :option:`SOC_SERIES_KINETIS_KV5X <CONFIG_SOC_SERIES_KINETIS_KV5X>`
- \ :option:`SOC_SERIES_LPC55XXX <CONFIG_SOC_SERIES_LPC55XXX>`
- \ :option:`SOC_SERIES_EFM32PG12B <CONFIG_SOC_SERIES_EFM32PG12B>`
- \ :option:`SOC_SERIES_EFM32PG1B <CONFIG_SOC_SERIES_EFM32PG1B>`
- \ :option:`SOC_SERIES_EFM32WG <CONFIG_SOC_SERIES_EFM32WG>`
- \ :option:`SOC_SERIES_EFR32BG13P <CONFIG_SOC_SERIES_EFR32BG13P>`
- \ :option:`SOC_SERIES_EFR32FG1P <CONFIG_SOC_SERIES_EFR32FG1P>`
- \ :option:`SOC_SERIES_EFR32MG12P <CONFIG_SOC_SERIES_EFR32MG12P>`
- \ :option:`SOC_SERIES_EFR32MG21 <CONFIG_SOC_SERIES_EFR32MG21>`
- \ :option:`SOC_SERIES_STM32F1X <CONFIG_SOC_SERIES_STM32F1X>`
- \ :option:`SOC_SERIES_STM32F2X <CONFIG_SOC_SERIES_STM32F2X>`
- \ :option:`SOC_SERIES_STM32F3X <CONFIG_SOC_SERIES_STM32F3X>`
- \ :option:`SOC_SERIES_STM32F4X <CONFIG_SOC_SERIES_STM32F4X>`
- \ :option:`SOC_SERIES_STM32F7X <CONFIG_SOC_SERIES_STM32F7X>`
- \ :option:`SOC_SERIES_STM32G4X <CONFIG_SOC_SERIES_STM32G4X>`
- \ :option:`SOC_SERIES_STM32H7X <CONFIG_SOC_SERIES_STM32H7X>`
- \ :option:`SOC_SERIES_STM32L1X <CONFIG_SOC_SERIES_STM32L1X>`
- \ :option:`SOC_SERIES_STM32L4X <CONFIG_SOC_SERIES_STM32L4X>`
- \ :option:`SOC_SERIES_STM32MP1X <CONFIG_SOC_SERIES_STM32MP1X>`
- \ :option:`SOC_SERIES_STM32WBX <CONFIG_SOC_SERIES_STM32WBX>`
- \ :option:`SOC_TI_LM3S6965 <CONFIG_SOC_TI_LM3S6965>`
- \ :option:`SOC_SERIES_CC13X2_CC26X2 <CONFIG_SOC_SERIES_CC13X2_CC26X2>`
- \ :option:`SOC_SERIES_CC32XX <CONFIG_SOC_SERIES_CC32XX>`
- \ :option:`SOC_SERIES_MSP432P4XX <CONFIG_SOC_SERIES_MSP432P4XX>`
- \ :option:`SOC_V2M_MUSCA_A <CONFIG_SOC_V2M_MUSCA_A>`
- \ :option:`SOC_V2M_MUSCA_B1 <CONFIG_SOC_V2M_MUSCA_B1>`
- \ :option:`SOC_V2M_MUSCA_S1 <CONFIG_SOC_V2M_MUSCA_S1>`
- \ :option:`SOC_PSOC6_M4 <CONFIG_SOC_PSOC6_M4>`
- \ :option:`SOC_NRF52832 <CONFIG_SOC_NRF52832>`
- \ :option:`SOC_NRF52833 <CONFIG_SOC_NRF52833>`
- \ :option:`SOC_NRF52840 <CONFIG_SOC_NRF52840>`
- \ :option:`SOC_MKW22D5 <CONFIG_SOC_MKW22D5>`
- \ :option:`SOC_MKW24D5 <CONFIG_SOC_MKW24D5>`
- \ :option:`SOC_LPC54114_M4 <CONFIG_SOC_LPC54114_M4>`

Kconfig definition
==================

.. highlight:: kconfig

At ``arch/arm/core/aarch32/cortex_m/Kconfig:80``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:29`` → ``arch/Kconfig:12`` → ``arch/arm/Kconfig:42`` → ``arch/arm/core/aarch32/Kconfig:237``

Menu path: (Top) → ARM Options

.. parsed-literal::

    config CPU_CORTEX_M_HAS_DWT
    	bool
    	depends on !\ :option:`CPU_CORTEX_M0 <CONFIG_CPU_CORTEX_M0>` && !\ :option:`CPU_CORTEX_M0PLUS <CONFIG_CPU_CORTEX_M0PLUS>` && !\ :option:`CPU_CORTEX_M1 <CONFIG_CPU_CORTEX_M1>` && \ :option:`CPU_CORTEX_M <CONFIG_CPU_CORTEX_M>` && !\ :option:`ARM64 <CONFIG_ARM64>` && \ :option:`ARM <CONFIG_ARM>`
    	help
    	  This option signifies that the CPU implements the Data Watchpoint and
    	  Trace (DWT) unit specified by the ARMv7-M and above.
	  
    	  While ARMv6-M does define a "DWT" unit, this is significantly different
    	  from the DWT specified by the ARMv7-M and above in terms of both feature
    	  set and register mappings.

*(The 'depends on' condition includes propagated dependencies from ifs and menus.)*