:orphan:

.. title:: CPU_CORTEX_M_HAS_VTOR

.. option:: CONFIG_CPU_CORTEX_M_HAS_VTOR

*(No prompt -- not directly user assignable.)*

Type: ``bool``

Help
====

This option signifies the CPU has the VTOR register.
The VTOR indicates the offset of the vector table base
address from memory address 0x00000000. Always present
in CPUs implementing the ARMv7-M or ARMv8-M architectures.
Optional in CPUs implementing ARMv6-M, ARMv8-M Baseline
architectures (except for Cortex-M0/M1, where it is never
implemented).

Direct dependencies
===================

!\ :option:`CPU_CORTEX_M0 <CONFIG_CPU_CORTEX_M0>` && !\ :option:`CPU_CORTEX_M1 <CONFIG_CPU_CORTEX_M1>` && \ :option:`CPU_CORTEX_M <CONFIG_CPU_CORTEX_M>` && !\ :option:`ARM64 <CONFIG_ARM64>` && \ :option:`ARM <CONFIG_ARM>`

*(Includes any dependencies from ifs and menus.)*

Defaults
========

No defaults. Implicitly defaults to ``n``.

Symbols that select this symbol
===============================

- \ :option:`SOC_SERIES_SAMD20 <CONFIG_SOC_SERIES_SAMD20>`
- \ :option:`SOC_SERIES_SAMD21 <CONFIG_SOC_SERIES_SAMD21>`
- \ :option:`SOC_SERIES_SAMR21 <CONFIG_SOC_SERIES_SAMR21>`
- \ :option:`SOC_SERIES_STM32G0X <CONFIG_SOC_SERIES_STM32G0X>`
- \ :option:`SOC_SERIES_STM32L0X <CONFIG_SOC_SERIES_STM32L0X>`
- \ :option:`SOC_PSOC6_M0 <CONFIG_SOC_PSOC6_M0>`
- \ :option:`SOC_LPC54114_M0 <CONFIG_SOC_LPC54114_M0>`
- \ :option:`ARMV7_M_ARMV8_M_MAINLINE <CONFIG_ARMV7_M_ARMV8_M_MAINLINE>`

Kconfig definition
==================

.. highlight:: kconfig

At ``arch/arm/core/aarch32/cortex_m/Kconfig:104``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:29`` → ``arch/Kconfig:12`` → ``arch/arm/Kconfig:42`` → ``arch/arm/core/aarch32/Kconfig:237``

Menu path: (Top) → ARM Options

.. parsed-literal::

    config CPU_CORTEX_M_HAS_VTOR
    	bool
    	depends on !\ :option:`CPU_CORTEX_M0 <CONFIG_CPU_CORTEX_M0>` && !\ :option:`CPU_CORTEX_M1 <CONFIG_CPU_CORTEX_M1>` && \ :option:`CPU_CORTEX_M <CONFIG_CPU_CORTEX_M>` && !\ :option:`ARM64 <CONFIG_ARM64>` && \ :option:`ARM <CONFIG_ARM>`
    	help
    	  This option signifies the CPU has the VTOR register.
    	  The VTOR indicates the offset of the vector table base
    	  address from memory address 0x00000000. Always present
    	  in CPUs implementing the ARMv7-M or ARMv8-M architectures.
    	  Optional in CPUs implementing ARMv6-M, ARMv8-M Baseline
    	  architectures (except for Cortex-M0/M1, where it is never
    	  implemented).

*(The 'depends on' condition includes propagated dependencies from ifs and menus.)*