:orphan:

.. title:: EAGER_FPU_SHARING

.. option:: CONFIG_EAGER_FPU_SHARING

*(No prompt -- not directly user assignable.)*

Type: ``bool``

Help
====

This hidden option unconditionally saves/restores the FPU/SIMD
register state on every context switch.

Mitigates CVE-2018-3665, but incurs a performance hit.

For vulnerable systems that process sensitive information in the
FPU register set, should be used any time CONFIG_FPU is
enabled, regardless if the FPU is used by one thread or multiple.

Direct dependencies
===================

\ :option:`FPU <CONFIG_FPU>` && \ :option:`USERSPACE <CONFIG_USERSPACE>` && \ :option:`CPU_HAS_FPU <CONFIG_CPU_HAS_FPU>` && !\ :option:`X86_64 <CONFIG_X86_64>` && \ :option:`X86 <CONFIG_X86>`

*(Includes any dependencies from ifs and menus.)*

Default
=======

- y if !\ :option:`X86_NO_LAZY_FP <CONFIG_X86_NO_LAZY_FP>`

Kconfig definition
==================

.. highlight:: kconfig

At ``arch/x86/core/Kconfig.ia32:112``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:29`` → ``arch/Kconfig:12`` → ``arch/x86/Kconfig:319``

Menu path: (Top) → X86 Architecture Options → Processor Capabilities → Architecture Floating Point Options

.. parsed-literal::

    config EAGER_FPU_SHARING
    	bool
    	default y if !\ :option:`X86_NO_LAZY_FP <CONFIG_X86_NO_LAZY_FP>`
    	depends on \ :option:`FPU <CONFIG_FPU>` && \ :option:`USERSPACE <CONFIG_USERSPACE>` && \ :option:`CPU_HAS_FPU <CONFIG_CPU_HAS_FPU>` && !\ :option:`X86_64 <CONFIG_X86_64>` && \ :option:`X86 <CONFIG_X86>`
    	help
    	  This hidden option unconditionally saves/restores the FPU/SIMD
    	  register state on every context switch.
	  
    	  Mitigates CVE-2018-3665, but incurs a performance hit.
	  
    	  For vulnerable systems that process sensitive information in the
    	  FPU register set, should be used any time CONFIG_FPU is
    	  enabled, regardless if the FPU is used by one thread or multiple.

*(The 'depends on' condition includes propagated dependencies from ifs and menus.)*