:orphan: .. title:: I2S_STM32_PLLI2S_PLLM .. option:: CONFIG_I2S_STM32_PLLI2S_PLLM *Division factor for PLLI2S VCO input clock* Type: ``int`` Help ==== Division factor for the audio PLL (PLLI2S) VCO input clock. PLLM factor should be selected to ensure that the VCO input frequency ranges from 1 to 2 MHz. It is recommended to select a frequency of 2 MHz to limit PLL jitter. Allowed values: 2-63 Direct dependencies =================== (\ :option:`I2S ` && \ :option:`BOARD_NUCLEO_F411RE `) || (\ :option:`I2S ` && \ :option:`BOARD_96B_ARGONKEY `) || (\ :option:`I2S ` && \ :option:`BOARD_96B_STM32_SENSOR_MEZ `) || (\ :option:`I2S ` && \ :option:`BOARD_NUCLEO_F411RE `) || (\ :option:`I2S_STM32_USE_PLLI2S_ENABLE ` && \ :option:`I2S_STM32 ` && \ :option:`I2S `) *(Includes any dependencies from ifs and menus.)* Defaults ======== - 8 - 8 - 8 - 8 - 8 Kconfig definitions =================== .. highlight:: kconfig At ``boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.defconfig:34`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:17`` → ``/home/runner/work/bridle/bridle/workspace/build/Kconfig/Kconfig.shield.defconfig:1`` → ``boards/shields/x_nucleo_iks02a1/Kconfig.defconfig:5`` Menu path: (Top) .. parsed-literal:: config I2S_STM32_PLLI2S_PLLM int default 8 depends on \ :option:`I2S ` && \ :option:`BOARD_NUCLEO_F411RE ` ---- At ``boards/arm/96b_argonkey/Kconfig.defconfig:17`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:18`` Menu path: (Top) .. parsed-literal:: config I2S_STM32_PLLI2S_PLLM int default 8 depends on \ :option:`I2S ` && \ :option:`BOARD_96B_ARGONKEY ` ---- At ``boards/arm/96b_stm32_sensor_mez/Kconfig.defconfig:17`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:18`` Menu path: (Top) .. parsed-literal:: config I2S_STM32_PLLI2S_PLLM int default 8 depends on \ :option:`I2S ` && \ :option:`BOARD_96B_STM32_SENSOR_MEZ ` ---- At ``boards/shields/x_nucleo_iks02a1/boards/nucleo_f411re.defconfig:34`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:18`` → ``boards/shields/x_nucleo_iks02a1/Kconfig.defconfig:5`` Menu path: (Top) .. parsed-literal:: config I2S_STM32_PLLI2S_PLLM int default 8 depends on \ :option:`I2S ` && \ :option:`BOARD_NUCLEO_F411RE ` ---- At ``drivers/i2s/Kconfig.stm32:30`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:32`` → ``drivers/Kconfig:42`` → ``drivers/i2s/Kconfig:28`` Menu path: (Top) → Device Drivers → I2S bus drivers → STM32 MCU I2S controller driver → Enable usage of PLL .. parsed-literal:: config I2S_STM32_PLLI2S_PLLM int "Division factor for PLLI2S VCO input clock" range 2 63 default 8 depends on \ :option:`I2S_STM32_USE_PLLI2S_ENABLE ` && \ :option:`I2S_STM32 ` && \ :option:`I2S ` help Division factor for the audio PLL (PLLI2S) VCO input clock. PLLM factor should be selected to ensure that the VCO input frequency ranges from 1 to 2 MHz. It is recommended to select a frequency of 2 MHz to limit PLL jitter. Allowed values: 2-63 *(The 'depends on' condition includes propagated dependencies from ifs and menus.)*