:orphan: .. title:: LAZY_FPU_SHARING .. option:: CONFIG_LAZY_FPU_SHARING *(No prompt -- not directly user assignable.)* Type: ``bool`` Help ==== This hidden option allows multiple threads to use the floating point registers, using logic to lazily save/restore the floating point register state on context switch. On Intel Core processors, may be vulnerable to exploits which allows malware to read the contents of all floating point registers, see CVE-2018-3665. Direct dependencies =================== \ :option:`FPU ` && !\ :option:`EAGER_FPU_SHARING ` && \ :option:`FPU_SHARING ` && \ :option:`CPU_HAS_FPU ` && !\ :option:`X86_64 ` && \ :option:`X86 ` *(Includes any dependencies from ifs and menus.)* Default ======= - y if \ :option:`X86_NO_LAZY_FP ` || !\ :option:`USERSPACE ` Kconfig definition ================== .. highlight:: kconfig At ``arch/x86/core/Kconfig.ia32:127`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:29`` → ``arch/Kconfig:12`` → ``arch/x86/Kconfig:319`` Menu path: (Top) → X86 Architecture Options → Processor Capabilities → Architecture Floating Point Options .. parsed-literal:: config LAZY_FPU_SHARING bool default y if \ :option:`X86_NO_LAZY_FP ` || !\ :option:`USERSPACE ` depends on \ :option:`FPU ` && !\ :option:`EAGER_FPU_SHARING ` && \ :option:`FPU_SHARING ` && \ :option:`CPU_HAS_FPU ` && !\ :option:`X86_64 ` && \ :option:`X86 ` help This hidden option allows multiple threads to use the floating point registers, using logic to lazily save/restore the floating point register state on context switch. On Intel Core processors, may be vulnerable to exploits which allows malware to read the contents of all floating point registers, see CVE-2018-3665. *(The 'depends on' condition includes propagated dependencies from ifs and menus.)*