:orphan:

.. title:: RV32M1_INTMUX

.. option:: CONFIG_RV32M1_INTMUX

*OpenISA RV32M1 INTMUX interrupt controller support*

Type: ``bool``

Help
====

Select this option to enable support for the RV32M1 INTMUX
driver. This provides a level 2 interrupt controller for the SoC.
The INTMUX peripheral combines level 2 interrupts into
eight channels; each channel has its own level 1 interrupt to
the core.

Direct dependencies
===================

(\ :option:`MULTI_LEVEL_INTERRUPTS <CONFIG_MULTI_LEVEL_INTERRUPTS>` && \ :option:`SOC_OPENISA_RV32M1_RISCV32 <CONFIG_SOC_OPENISA_RV32M1_RISCV32>`) || (\ :option:`SOC_OPENISA_RV32M1_RISCV32 <CONFIG_SOC_OPENISA_RV32M1_RISCV32>` && \ :option:`MULTI_LEVEL_INTERRUPTS <CONFIG_MULTI_LEVEL_INTERRUPTS>`)

*(Includes any dependencies from ifs and menus.)*

Default
=======

- y

Kconfig definitions
===================

.. highlight:: kconfig

At ``soc/riscv/openisa_rv32m1/Kconfig.defconfig:96``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:19`` → ``/home/runner/work/bridle/bridle/workspace/build/Kconfig/Kconfig.soc.defconfig:1``

Menu path: (Top)

.. parsed-literal::

    config RV32M1_INTMUX
    	bool
    	default y
    	depends on \ :option:`MULTI_LEVEL_INTERRUPTS <CONFIG_MULTI_LEVEL_INTERRUPTS>` && \ :option:`SOC_OPENISA_RV32M1_RISCV32 <CONFIG_SOC_OPENISA_RV32M1_RISCV32>`

----

At ``drivers/interrupt_controller/Kconfig.rv32m1:6``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:32`` → ``drivers/Kconfig:26`` → ``drivers/interrupt_controller/Kconfig:61``

Menu path: (Top) → Device Drivers → Interrupt Controllers

.. parsed-literal::

    config RV32M1_INTMUX
    	bool "OpenISA RV32M1 INTMUX interrupt controller support"
    	depends on \ :option:`SOC_OPENISA_RV32M1_RISCV32 <CONFIG_SOC_OPENISA_RV32M1_RISCV32>` && \ :option:`MULTI_LEVEL_INTERRUPTS <CONFIG_MULTI_LEVEL_INTERRUPTS>`
    	help
    	  Select this option to enable support for the RV32M1 INTMUX
    	  driver. This provides a level 2 interrupt controller for the SoC.
    	  The INTMUX peripheral combines level 2 interrupts into
    	  eight channels; each channel has its own level 1 interrupt to
    	  the core.

*(The 'depends on' condition includes propagated dependencies from ifs and menus.)*