:orphan: .. title:: SOC_ATMEL_SAME70_PLLA_DIVA .. option:: CONFIG_SOC_ATMEL_SAME70_PLLA_DIVA *PLL DIVA* Type: ``int`` Help ==== This is the divider DIVA used by the PLL. The processor clock is (MAINCK * (MULA + 1) / DIVA). Board config file can override this settings for a particular board. Setting DIVA=0 would disable PLL at boot, this is currently not supported. With default of MULA == 24, and DIVA == 1, PLL is running at 25 times the main clock frequency. Direct dependencies =================== \ :option:`SOC_SERIES_SAME70 ` && \ :option:`SOC_FAMILY_SAM ` *(Includes any dependencies from ifs and menus.)* Default ======= - 1 Kconfig definition ================== .. highlight:: kconfig At ``soc/arm/atmel_sam/same70/Kconfig.soc:133`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:28`` → ``soc/Kconfig:11`` → ``/home/runner/work/bridle/bridle/workspace/build/Kconfig/Kconfig.soc.arch:2`` → ``soc/arm/atmel_sam/Kconfig:17`` Menu path: (Top) → Hardware Configuration .. parsed-literal:: config SOC_ATMEL_SAME70_PLLA_DIVA int "PLL DIVA" range 1 255 default 1 depends on \ :option:`SOC_SERIES_SAME70 ` && \ :option:`SOC_FAMILY_SAM ` help This is the divider DIVA used by the PLL. The processor clock is (MAINCK * (MULA + 1) / DIVA). Board config file can override this settings for a particular board. Setting DIVA=0 would disable PLL at boot, this is currently not supported. With default of MULA == 24, and DIVA == 1, PLL is running at 25 times the main clock frequency. *(The 'depends on' condition includes propagated dependencies from ifs and menus.)*