:orphan: .. title:: 3RD_LVL_ISR_TBL_OFFSET .. option:: CONFIG_3RD_LVL_ISR_TBL_OFFSET *Offset in \_sw\_isr\_table for level 3 interrupts* Type: ``int`` Help ==== .. code-block:: none This is the offset in _sw_isr_table, the generated ISR handler table, where storage for 3rd level interrupt ISRs begins. This is typically allocated after ISRs for level 2 interrupts. Direct dependencies =================== \ :option:`BOARD_INTEL_S1000_CRB ` || \ :option:`3RD_LEVEL_INTERRUPTS ` *(Includes any dependencies from ifs and menus.)* Defaults ======== - 149 - 0 Kconfig definitions =================== At ``/xtensa/intel_s1000_crb/Kconfig.defconfig:40`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:18`` Menu path: (Top) .. code-block:: kconfig config 3RD_LVL_ISR_TBL_OFFSET int default 149 depends on BOARD_INTEL_S1000_CRB ---- At ``/interrupt_controller/Kconfig.multilevel:92`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:32`` → ``/Kconfig:26`` → ``/interrupt_controller/Kconfig:49`` Menu path: (Top) → Device Drivers → Interrupt Controllers → Multi-level interrupt support → Second-level interrupt support → Third-level interrupt support .. code-block:: kconfig config 3RD_LVL_ISR_TBL_OFFSET int "Offset in _sw_isr_table for level 3 interrupts" default 0 depends on 3RD_LEVEL_INTERRUPTS help This is the offset in _sw_isr_table, the generated ISR handler table, where storage for 3rd level interrupt ISRs begins. This is typically allocated after ISRs for level 2 interrupts. *(The 'depends on' condition includes propagated dependencies from ifs and menus.)*