:orphan: .. title:: SECOND_CORE_BOOT_ADDRESS_MCUX .. option:: CONFIG_SECOND_CORE_BOOT_ADDRESS_MCUX *Address the second core will boot at* *Address the second core will boot at* Type: ``hex`` Help ==== .. code-block:: none This is the address the second core will boot from. Additionally this address is where we will copy the SECOND_IMAGE to. We default this to the base of SRAM1. Help ==== .. code-block:: none This is the address the second core will boot from. Direct dependencies =================== (\ :option:`SECOND_CORE_MCUX ` && \ :option:`SOC_SERIES_LPC54XXX ` && \ :option:`SOC_FAMILY_LPC `) || (\ :option:`SECOND_CORE_MCUX ` && \ :option:`SOC_SERIES_LPC55XXX ` && \ :option:`SOC_FAMILY_LPC `) *(Includes any dependencies from ifs and menus.)* Defaults ======== - 0x20010000 - 0x0 Kconfig definitions =================== At ``/arm/nxp_lpc/lpc54xxx/Kconfig.soc:54`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:28`` → ``/Kconfig:11`` → ``/kconfig/Kconfig.soc.arch:2`` → ``/arm/nxp_lpc/Kconfig:14`` Menu path: (Top) → Hardware Configuration → Enable LPC54114 Cortex-M0 second core .. code-block:: kconfig config SECOND_CORE_BOOT_ADDRESS_MCUX hex "Address the second core will boot at" default 0x20010000 depends on SECOND_CORE_MCUX && SOC_SERIES_LPC54XXX && SOC_FAMILY_LPC help This is the address the second core will boot from. Additionally this address is where we will copy the SECOND_IMAGE to. We default this to the base of SRAM1. ---- At ``/arm/nxp_lpc/lpc55xxx/Kconfig.soc:95`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:28`` → ``/Kconfig:11`` → ``/kconfig/Kconfig.soc.arch:2`` → ``/arm/nxp_lpc/Kconfig:14`` Menu path: (Top) → Hardware Configuration → Enable LPC55xxx's second core .. code-block:: kconfig config SECOND_CORE_BOOT_ADDRESS_MCUX hex "Address the second core will boot at" default 0x0 depends on SECOND_CORE_MCUX && SOC_SERIES_LPC55XXX && SOC_FAMILY_LPC help This is the address the second core will boot from. *(The 'depends on' condition includes propagated dependencies from ifs and menus.)*