:orphan:

.. title:: CONFIG_ARMV7_R

.. kconfig:: CONFIG_ARMV7_R

CONFIG_ARMV7_R
##############

*(No prompt -- not directly user assignable.)*

Type: ``bool``

Help
====

.. code-block:: none

    This option signifies the use of an ARMv7-R processor
    implementation.

    From https://developer.arm.com/products/architecture/cpu-architecture/r-profile:
    The Armv7-R architecture implements a traditional Arm architecture with
    multiple modes and supports a Protected Memory System Architecture
    (PMSA) based on a Memory Protection Unit (MPU). It supports the Arm (32)
    and Thumb (T32) instruction sets.

Direct dependencies
===================

\ :kconfig:`CPU_CORTEX_R <CONFIG_CPU_CORTEX_R>` && \ :kconfig:`ARM <CONFIG_ARM>`

*(Includes any dependencies from ifs and menus.)*

Defaults
========

No defaults. Implicitly defaults to ``n``.

Symbols selected by this symbol
===============================

- \ :kconfig:`ATOMIC_OPERATIONS_BUILTIN <CONFIG_ATOMIC_OPERATIONS_BUILTIN>`
- \ :kconfig:`ISA_ARM <CONFIG_ISA_ARM>`
- \ :kconfig:`ISA_THUMB2 <CONFIG_ISA_THUMB2>`

Symbols that select this symbol
===============================

- \ :kconfig:`CPU_CORTEX_R4 <CONFIG_CPU_CORTEX_R4>`
- \ :kconfig:`CPU_CORTEX_R5 <CONFIG_CPU_CORTEX_R5>`
- \ :kconfig:`CPU_CORTEX_R7 <CONFIG_CPU_CORTEX_R7>`

Kconfig definition
==================



At ``<Zephyr Architecture>/arm/core/aarch32/cortex_a_r/Kconfig:40``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:39`` → ``<Zephyr Architecture>/Kconfig:12`` → ``<Zephyr Architecture>/arm/Kconfig:57`` → ``<Zephyr Architecture>/arm/core/aarch32/Kconfig:295``

Menu path: (Top) → ARM Options

.. code-block:: kconfig

    config ARMV7_R
    	bool
    	select ATOMIC_OPERATIONS_BUILTIN
    	select ISA_ARM
    	select ISA_THUMB2
    	depends on CPU_CORTEX_R && ARM
    	help
    	  This option signifies the use of an ARMv7-R processor
    	  implementation.
	  
    	  From https://developer.arm.com/products/architecture/cpu-architecture/r-profile:
    	  The Armv7-R architecture implements a traditional Arm architecture with
    	  multiple modes and supports a Protected Memory System Architecture
    	  (PMSA) based on a Memory Protection Unit (MPU). It supports the Arm (32)
    	  and Thumb (T32) instruction sets.

*(The 'depends on' condition includes propagated dependencies from ifs and menus.)*