:orphan:

.. title:: CONFIG_CLOCK_STM32_PLL3_P_ENABLE

.. kconfig:: CONFIG_CLOCK_STM32_PLL3_P_ENABLE

CONFIG_CLOCK_STM32_PLL3_P_ENABLE
################################

*Enable PLL3 P output*

Type: ``bool``

Help
====

.. code-block:: none

    Enable PLL3 P output.

Direct dependencies
===================

\ :kconfig:`CLOCK_STM32_PLL3_ENABLE <CONFIG_CLOCK_STM32_PLL3_ENABLE>` && \ :kconfig:`SOC_SERIES_STM32H7X <CONFIG_SOC_SERIES_STM32H7X>` && !\ :kconfig:`CLOCK_CONTROL_STM32_HAS_DTS <CONFIG_CLOCK_CONTROL_STM32_HAS_DTS>` && !\ :kconfig:`SOC_SERIES_STM32MP1X <CONFIG_SOC_SERIES_STM32MP1X>` && \ :kconfig:`CLOCK_CONTROL_STM32_CUBE <CONFIG_CLOCK_CONTROL_STM32_CUBE>` && \ :kconfig:`CLOCK_CONTROL <CONFIG_CLOCK_CONTROL>`

*(Includes any dependencies from ifs and menus.)*

Defaults
========

No defaults. Implicitly defaults to ``n``.

Kconfig definition
==================



At ``<Zephyr Driver>/clock_control/Kconfig.stm32h7:130``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:42`` → ``<Zephyr Driver>/Kconfig:56`` → ``<Zephyr Driver>/clock_control/Kconfig:25`` → ``<Zephyr Driver>/clock_control/Kconfig.stm32:153``

Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control → Enable PLL3

.. code-block:: kconfig

    config CLOCK_STM32_PLL3_P_ENABLE
    	bool "Enable PLL3 P output"
    	depends on CLOCK_STM32_PLL3_ENABLE && SOC_SERIES_STM32H7X && !CLOCK_CONTROL_STM32_HAS_DTS && !SOC_SERIES_STM32MP1X && CLOCK_CONTROL_STM32_CUBE && CLOCK_CONTROL
    	help
    	  Enable PLL3 P output.

*(The 'depends on' condition includes propagated dependencies from ifs and menus.)*