:orphan:

.. title:: CONFIG_CLOCK_STM32_PLL_PREDIV1

.. kconfig:: CONFIG_CLOCK_STM32_PLL_PREDIV1

CONFIG_CLOCK_STM32_PLL_PREDIV1
##############################

*PREDIV1 Prescaler*

*PREDIV1 Prescaler*

Type: ``int``

Help
====

.. code-block:: none

    PREDIV1 is a PLL clock signal prescaler for any PLL input.
    It is supported by STM32F04xx, STM32F07xx, STM32F09xx, STM32F030xC,
    STM32F302xE, STM32F303xE and STM32F39xx parts.
    If configured on a non-supported part, this config will be ignored.
    Allowed values: 1 - 16.

Help
====

.. code-block:: none

    PREDIV1 is PLL clock signal prescaler, allowed values: 1 - 16.

Direct dependencies
===================

(\ :kconfig:`CLOCK_STM32_SYSCLK_SRC_PLL <CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL>` && (\ :kconfig:`SOC_SERIES_STM32F0X <CONFIG_SOC_SERIES_STM32F0X>` || \ :kconfig:`SOC_SERIES_STM32F3X <CONFIG_SOC_SERIES_STM32F3X>`) && !\ :kconfig:`CLOCK_CONTROL_STM32_HAS_DTS <CONFIG_CLOCK_CONTROL_STM32_HAS_DTS>` && !\ :kconfig:`SOC_SERIES_STM32MP1X <CONFIG_SOC_SERIES_STM32MP1X>` && \ :kconfig:`CLOCK_CONTROL_STM32_CUBE <CONFIG_CLOCK_CONTROL_STM32_CUBE>` && \ :kconfig:`CLOCK_CONTROL <CONFIG_CLOCK_CONTROL>`) || (!\ :kconfig:`SOC_STM32F10X_DENSITY_DEVICE <CONFIG_SOC_STM32F10X_DENSITY_DEVICE>` && \ :kconfig:`CLOCK_STM32_SYSCLK_SRC_PLL <CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL>` && \ :kconfig:`SOC_SERIES_STM32F1X <CONFIG_SOC_SERIES_STM32F1X>` && !\ :kconfig:`CLOCK_CONTROL_STM32_HAS_DTS <CONFIG_CLOCK_CONTROL_STM32_HAS_DTS>` && !\ :kconfig:`SOC_SERIES_STM32MP1X <CONFIG_SOC_SERIES_STM32MP1X>` && \ :kconfig:`CLOCK_CONTROL_STM32_CUBE <CONFIG_CLOCK_CONTROL_STM32_CUBE>` && \ :kconfig:`CLOCK_CONTROL <CONFIG_CLOCK_CONTROL>`)

*(Includes any dependencies from ifs and menus.)*

Defaults
========

- 1
- 1

Kconfig definitions
===================



At ``<Zephyr Driver>/clock_control/Kconfig.stm32f0_f3:19``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:42`` → ``<Zephyr Driver>/Kconfig:56`` → ``<Zephyr Driver>/clock_control/Kconfig:25`` → ``<Zephyr Driver>/clock_control/Kconfig.stm32:150``

Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control

.. code-block:: kconfig

    config CLOCK_STM32_PLL_PREDIV1
    	int "PREDIV1 Prescaler"
    	range 1 16
    	default 1
    	depends on CLOCK_STM32_SYSCLK_SRC_PLL && (SOC_SERIES_STM32F0X || SOC_SERIES_STM32F3X) && !CLOCK_CONTROL_STM32_HAS_DTS && !SOC_SERIES_STM32MP1X && CLOCK_CONTROL_STM32_CUBE && CLOCK_CONTROL
    	help
    	  PREDIV1 is a PLL clock signal prescaler for any PLL input.
    	  It is supported by STM32F04xx, STM32F07xx, STM32F09xx, STM32F030xC,
    	  STM32F302xE, STM32F303xE and STM32F39xx parts.
    	  If configured on a non-supported part, this config will be ignored.
    	  Allowed values: 1 - 16.

----

At ``<Zephyr Driver>/clock_control/Kconfig.stm32f1:25``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:42`` → ``<Zephyr Driver>/Kconfig:56`` → ``<Zephyr Driver>/clock_control/Kconfig:25`` → ``<Zephyr Driver>/clock_control/Kconfig.stm32:151``

Menu path: (Top) → Device Drivers → Hardware clock controller support → STM32 Reset & Clock Control

.. code-block:: kconfig

    config CLOCK_STM32_PLL_PREDIV1
    	int "PREDIV1 Prescaler"
    	range 1 16
    	default 1
    	depends on !SOC_STM32F10X_DENSITY_DEVICE && CLOCK_STM32_SYSCLK_SRC_PLL && SOC_SERIES_STM32F1X && !CLOCK_CONTROL_STM32_HAS_DTS && !SOC_SERIES_STM32MP1X && CLOCK_CONTROL_STM32_CUBE && CLOCK_CONTROL
    	help
    	  PREDIV1 is PLL clock signal prescaler, allowed values: 1 - 16.

*(The 'depends on' condition includes propagated dependencies from ifs and menus.)*