:orphan:

.. title:: CONFIG_RISCV_PMP

.. kconfig:: CONFIG_RISCV_PMP

CONFIG_RISCV_PMP
################

*RISC-V PMP Support*

Type: ``bool``

Help
====

.. code-block:: none

    MCU implements Physical Memory Protection.
    Memory protection against read-only area writing
    is natively supported on real HW.

Direct dependencies
===================

\ :kconfig:`RISCV <CONFIG_RISCV>`

*(Includes any dependencies from ifs and menus.)*

Default
=======

- n

Symbols selected by this symbol
===============================

- \ :kconfig:`THREAD_STACK_INFO <CONFIG_THREAD_STACK_INFO>`
- \ :kconfig:`CPU_HAS_MPU <CONFIG_CPU_HAS_MPU>`
- \ :kconfig:`MPU <CONFIG_MPU>`
- \ :kconfig:`SRAM_REGION_PERMISSIONS <CONFIG_SRAM_REGION_PERMISSIONS>`
- \ :kconfig:`ARCH_MEM_DOMAIN_SYNCHRONOUS_API <CONFIG_ARCH_MEM_DOMAIN_SYNCHRONOUS_API>` if \ :kconfig:`USERSPACE <CONFIG_USERSPACE>`
- \ :kconfig:`PMP_POWER_OF_TWO_ALIGNMENT <CONFIG_PMP_POWER_OF_TWO_ALIGNMENT>` if \ :kconfig:`USERSPACE <CONFIG_USERSPACE>`

Symbols that select this symbol
===============================

- \ :kconfig:`CORE_E31 <CONFIG_CORE_E31>`

Kconfig definition
==================



At ``<Zephyr Architecture>/riscv/Kconfig:127``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:39`` → ``<Zephyr Architecture>/Kconfig:12``

Menu path: (Top) → RISCV Options → RISCV Processor Options

.. code-block:: kconfig

    menuconfig RISCV_PMP
    	bool "RISC-V PMP Support"
    	default n
    	select THREAD_STACK_INFO
    	select CPU_HAS_MPU
    	select MPU
    	select SRAM_REGION_PERMISSIONS
    	select ARCH_MEM_DOMAIN_SYNCHRONOUS_API if USERSPACE
    	select PMP_POWER_OF_TWO_ALIGNMENT if USERSPACE
    	depends on RISCV
    	help
    	  MCU implements Physical Memory Protection.
    	  Memory protection against read-only area writing
    	  is natively supported on real HW.

*(The 'depends on' condition includes propagated dependencies from ifs and menus.)*