:orphan:

.. title:: CONFIG_RV32M1_INTMUX

.. kconfig:: CONFIG_RV32M1_INTMUX

CONFIG_RV32M1_INTMUX
####################

*OpenISA RV32M1 INTMUX interrupt controller support*

Type: ``bool``

Help
====

.. code-block:: none

    Select this option to enable support for the RV32M1 INTMUX
    driver. This provides a level 2 interrupt controller for the SoC.
    The INTMUX peripheral combines level 2 interrupts into
    eight channels; each channel has its own level 1 interrupt to
    the core.

Direct dependencies
===================

(\ :kconfig:`MULTI_LEVEL_INTERRUPTS <CONFIG_MULTI_LEVEL_INTERRUPTS>` && \ :kconfig:`SOC_OPENISA_RV32M1_RISCV32 <CONFIG_SOC_OPENISA_RV32M1_RISCV32>`) || (\ :kconfig:`MULTI_LEVEL_INTERRUPTS <CONFIG_MULTI_LEVEL_INTERRUPTS>` && \ :kconfig:`SOC_OPENISA_RV32M1_RISCV32 <CONFIG_SOC_OPENISA_RV32M1_RISCV32>`) || (\ :kconfig:`SOC_OPENISA_RV32M1_RISCV32 <CONFIG_SOC_OPENISA_RV32M1_RISCV32>` && \ :kconfig:`MULTI_LEVEL_INTERRUPTS <CONFIG_MULTI_LEVEL_INTERRUPTS>`)

*(Includes any dependencies from ifs and menus.)*

Defaults
========

- y
- y

Kconfig definitions
===================



At ``<Zephyr SoC>/riscv/openisa_rv32m1/Kconfig.defconfig:96``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:25`` → ``<BuildDir>/kconfig/Kconfig.soc.defconfig:1``

Menu path: (Top)

.. code-block:: kconfig

    config RV32M1_INTMUX
    	bool
    	default y
    	depends on MULTI_LEVEL_INTERRUPTS && SOC_OPENISA_RV32M1_RISCV32

----

At ``<Zephyr SoC>/riscv/openisa_rv32m1/Kconfig.defconfig:96``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:27``

Menu path: (Top)

.. code-block:: kconfig

    config RV32M1_INTMUX
    	bool
    	default y
    	depends on MULTI_LEVEL_INTERRUPTS && SOC_OPENISA_RV32M1_RISCV32

----

At ``<Zephyr Driver>/interrupt_controller/Kconfig.rv32m1:6``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:42`` → ``<Zephyr Driver>/Kconfig:28`` → ``<Zephyr Driver>/interrupt_controller/Kconfig:60``

Menu path: (Top) → Device Drivers → Interrupt Controllers

.. code-block:: kconfig

    config RV32M1_INTMUX
    	bool "OpenISA RV32M1 INTMUX interrupt controller support"
    	depends on SOC_OPENISA_RV32M1_RISCV32 && MULTI_LEVEL_INTERRUPTS
    	help
    	  Select this option to enable support for the RV32M1 INTMUX
    	  driver. This provides a level 2 interrupt controller for the SoC.
    	  The INTMUX peripheral combines level 2 interrupts into
    	  eight channels; each channel has its own level 1 interrupt to
    	  the core.

*(The 'depends on' condition includes propagated dependencies from ifs and menus.)*