:orphan:

.. title:: CONFIG_SECOND_CORE_BOOT_ADDRESS_MCUX

.. kconfig:: CONFIG_SECOND_CORE_BOOT_ADDRESS_MCUX

CONFIG_SECOND_CORE_BOOT_ADDRESS_MCUX
####################################

*Address the second core will boot at*

*Address the second core will boot at*

*Address the second core will boot at*

*Address the second core will boot at*

Type: ``hex``

Help
====

.. code-block:: none

    This is the address the second core will boot from. Additionally this
    address is where we will copy the SECOND_IMAGE to. We default this to
    the base of SRAM1.

Help
====

.. code-block:: none

    This is the address the second core will boot from.

Help
====

.. code-block:: none

    This is the address the second core will boot from. Additionally this
    address is where we will copy the SECOND_IMAGE to. We default this to
    the base of SRAM1.

Help
====

.. code-block:: none

    This is the address the second core will boot from.

Direct dependencies
===================

(\ :kconfig:`SECOND_CORE_MCUX <CONFIG_SECOND_CORE_MCUX>` && \ :kconfig:`SOC_SERIES_LPC54XXX <CONFIG_SOC_SERIES_LPC54XXX>` && \ :kconfig:`SOC_FAMILY_LPC <CONFIG_SOC_FAMILY_LPC>`) || (\ :kconfig:`SECOND_CORE_MCUX <CONFIG_SECOND_CORE_MCUX>` && \ :kconfig:`SOC_SERIES_LPC55XXX <CONFIG_SOC_SERIES_LPC55XXX>` && \ :kconfig:`SOC_FAMILY_LPC <CONFIG_SOC_FAMILY_LPC>`) || (\ :kconfig:`SECOND_CORE_MCUX <CONFIG_SECOND_CORE_MCUX>` && \ :kconfig:`SOC_SERIES_LPC54XXX <CONFIG_SOC_SERIES_LPC54XXX>` && \ :kconfig:`SOC_FAMILY_LPC <CONFIG_SOC_FAMILY_LPC>`) || (\ :kconfig:`SECOND_CORE_MCUX <CONFIG_SECOND_CORE_MCUX>` && \ :kconfig:`SOC_SERIES_LPC55XXX <CONFIG_SOC_SERIES_LPC55XXX>` && \ :kconfig:`SOC_FAMILY_LPC <CONFIG_SOC_FAMILY_LPC>`)

*(Includes any dependencies from ifs and menus.)*

Defaults
========

- 0x20010000
- 0x0
- 0x20010000
- 0x0

Kconfig definitions
===================



At ``<Zephyr SoC>/arm/nxp_lpc/lpc54xxx/Kconfig.soc:54``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:38`` → ``<Zephyr SoC>/Kconfig:15`` → ``<BuildDir>/kconfig/Kconfig.soc.arch:2`` → ``<Zephyr SoC>/arm/nxp_lpc/Kconfig:14``

Menu path: (Top) → Hardware Configuration → Enable LPC54114 Cortex-M0 second core

.. code-block:: kconfig

    config SECOND_CORE_BOOT_ADDRESS_MCUX
    	hex "Address the second core will boot at"
    	default 0x20010000
    	depends on SECOND_CORE_MCUX && SOC_SERIES_LPC54XXX && SOC_FAMILY_LPC
    	help
    	  This is the address the second core will boot from. Additionally this
    	  address is where we will copy the SECOND_IMAGE to. We default this to
    	  the base of SRAM1.

----

At ``<Zephyr SoC>/arm/nxp_lpc/lpc55xxx/Kconfig.soc:102``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:38`` → ``<Zephyr SoC>/Kconfig:15`` → ``<BuildDir>/kconfig/Kconfig.soc.arch:2`` → ``<Zephyr SoC>/arm/nxp_lpc/Kconfig:14``

Menu path: (Top) → Hardware Configuration

.. code-block:: kconfig

    config SECOND_CORE_BOOT_ADDRESS_MCUX
    	hex "Address the second core will boot at"
    	default 0x0
    	depends on SECOND_CORE_MCUX && SOC_SERIES_LPC55XXX && SOC_FAMILY_LPC
    	help
    	  This is the address the second core will boot from.

----

At ``<Zephyr SoC>/arm/nxp_lpc/lpc54xxx/Kconfig.soc:54``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:38`` → ``<Zephyr SoC>/Kconfig:18`` → ``<Zephyr SoC>/arm/nxp_lpc/Kconfig:14``

Menu path: (Top) → Hardware Configuration → Enable LPC54114 Cortex-M0 second core

.. code-block:: kconfig

    config SECOND_CORE_BOOT_ADDRESS_MCUX
    	hex "Address the second core will boot at"
    	default 0x20010000
    	depends on SECOND_CORE_MCUX && SOC_SERIES_LPC54XXX && SOC_FAMILY_LPC
    	help
    	  This is the address the second core will boot from. Additionally this
    	  address is where we will copy the SECOND_IMAGE to. We default this to
    	  the base of SRAM1.

----

At ``<Zephyr SoC>/arm/nxp_lpc/lpc55xxx/Kconfig.soc:102``

Included via ``Kconfig:8`` → ``Kconfig.zephyr:38`` → ``<Zephyr SoC>/Kconfig:18`` → ``<Zephyr SoC>/arm/nxp_lpc/Kconfig:14``

Menu path: (Top) → Hardware Configuration

.. code-block:: kconfig

    config SECOND_CORE_BOOT_ADDRESS_MCUX
    	hex "Address the second core will boot at"
    	default 0x0
    	depends on SECOND_CORE_MCUX && SOC_SERIES_LPC55XXX && SOC_FAMILY_LPC
    	help
    	  This is the address the second core will boot from.

*(The 'depends on' condition includes propagated dependencies from ifs and menus.)*