:orphan: .. title:: CONFIG_RISCV_HAS_CPU_IDLE .. kconfig:: CONFIG_RISCV_HAS_CPU_IDLE CONFIG_RISCV_HAS_CPU_IDLE ######################### *Does SOC has CPU IDLE instruction* Type: ``bool`` Help ==== .. code-block:: none Does SOC has CPU IDLE instruction Direct dependencies =================== \ :kconfig:`SOC_RISCV32_LITEX_VEXRISCV ` || \ :kconfig:`SOC_SERIES_RISCV32_IT8XXX2 ` || \ :kconfig:`SOC_SERIES_RISCV_ANDES_V5 ` || (\ :kconfig:`SOC_GD32VF103 ` && \ :kconfig:`SOC_SERIES_GD32VF103 `) || \ :kconfig:`SOC_SERIES_RISCV32_MIV ` || \ :kconfig:`SOC_SERIES_NEORV32 ` || \ :kconfig:`SOC_SERIES_RISCV_SIFIVE_FREEDOM ` || \ :kconfig:`SOC_SERIES_STARFIVE_JH71XX ` || \ :kconfig:`SOC_SERIES_RISCV_TELINK_B91 ` || \ :kconfig:`SOC_SERIES_RISCV_VIRT ` || \ :kconfig:`RISCV ` *(Includes any dependencies from ifs and menus.)* Defaults ======== - y - y - y - y - y - y - y - y - y Kconfig definitions =================== At ``/riscv/litex-vexriscv/Kconfig.defconfig:12`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:27`` Menu path: (Top) .. code-block:: kconfig config RISCV_HAS_CPU_IDLE bool depends on SOC_RISCV32_LITEX_VEXRISCV ---- At ``/riscv/riscv-ite/it8xxx2/Kconfig.defconfig.series:40`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:27`` → ``/riscv/riscv-ite/Kconfig.defconfig:4`` Menu path: (Top) .. code-block:: kconfig config RISCV_HAS_CPU_IDLE bool default y depends on SOC_SERIES_RISCV32_IT8XXX2 ---- At ``/riscv/riscv-privilege/andes_v5/Kconfig.defconfig.series:27`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:27`` → ``/riscv/riscv-privilege/Kconfig.defconfig:6`` Menu path: (Top) .. code-block:: kconfig config RISCV_HAS_CPU_IDLE bool default y depends on SOC_SERIES_RISCV_ANDES_V5 ---- At ``/riscv/riscv-privilege/gd32vf103/Kconfig.defconfig.gd32vf103:24`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:27`` → ``/riscv/riscv-privilege/Kconfig.defconfig:6`` → ``/riscv/riscv-privilege/gd32vf103/Kconfig.defconfig.series:6`` Menu path: (Top) .. code-block:: kconfig config RISCV_HAS_CPU_IDLE bool default y depends on SOC_GD32VF103 && SOC_SERIES_GD32VF103 ---- At ``/riscv/riscv-privilege/miv/Kconfig.defconfig.series:14`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:27`` → ``/riscv/riscv-privilege/Kconfig.defconfig:6`` Menu path: (Top) .. code-block:: kconfig config RISCV_HAS_CPU_IDLE bool default y depends on SOC_SERIES_RISCV32_MIV ---- At ``/riscv/riscv-privilege/neorv32/Kconfig.defconfig.series:15`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:27`` → ``/riscv/riscv-privilege/Kconfig.defconfig:6`` Menu path: (Top) .. code-block:: kconfig config RISCV_HAS_CPU_IDLE bool default y depends on SOC_SERIES_NEORV32 ---- At ``/riscv/riscv-privilege/sifive-freedom/Kconfig.defconfig.series:14`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:27`` → ``/riscv/riscv-privilege/Kconfig.defconfig:6`` Menu path: (Top) .. code-block:: kconfig config RISCV_HAS_CPU_IDLE bool default y depends on SOC_SERIES_RISCV_SIFIVE_FREEDOM ---- At ``/riscv/riscv-privilege/starfive_jh71xx/Kconfig.defconfig.series:15`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:27`` → ``/riscv/riscv-privilege/Kconfig.defconfig:6`` Menu path: (Top) .. code-block:: kconfig config RISCV_HAS_CPU_IDLE bool default y depends on SOC_SERIES_STARFIVE_JH71XX ---- At ``/riscv/riscv-privilege/telink_b91/Kconfig.defconfig.series:18`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:27`` → ``/riscv/riscv-privilege/Kconfig.defconfig:6`` Menu path: (Top) .. code-block:: kconfig config RISCV_HAS_CPU_IDLE bool default y depends on SOC_SERIES_RISCV_TELINK_B91 ---- At ``/riscv/riscv-privilege/virt/Kconfig.defconfig.series:15`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:27`` → ``/riscv/riscv-privilege/Kconfig.defconfig:6`` Menu path: (Top) .. code-block:: kconfig config RISCV_HAS_CPU_IDLE bool default y depends on SOC_SERIES_RISCV_VIRT ---- At ``/riscv/Kconfig:120`` Included via ``Kconfig:8`` → ``Kconfig.zephyr:39`` → ``/Kconfig:12`` Menu path: (Top) → RISCV Options → RISCV Processor Options .. code-block:: kconfig config RISCV_HAS_CPU_IDLE bool "Does SOC has CPU IDLE instruction" depends on RISCV help Does SOC has CPU IDLE instruction *(The 'depends on' condition includes propagated dependencies from ifs and menus.)*