CONFIG_SOC_ANDES_V5_L2_CACHE
Enable Andes V5 L2 cache controller
Type: bool
Direct dependencies
CACHE_ENABLE
&& SOC_SERIES_RISCV_ANDES_V5
(Includes any dependencies from ifs and menus.)
Default
y
Kconfig definition
At <SoC>/riscv/riscv-privilege/andes_v5/Kconfig.soc:51
Included via Kconfig:8
→ Kconfig.zephyr:38
→ <SoC>/Kconfig:18
→ <SoC>/riscv/riscv-privilege/Kconfig:22
Menu path: (Top) → Hardware Configuration → Enable cache
config SOC_ANDES_V5_L2_CACHE
bool "Enable Andes V5 L2 cache controller"
default y
depends on CACHE_ENABLE && SOC_SERIES_RISCV_ANDES_V5
(The ‘depends on’ condition includes propagated dependencies from ifs and menus.)