Zephyr Project API  3.1.0
A Scalable Open Source RTOS
gpio.h
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1/*
2 * Copyright (c) 2019-2020 Nordic Semiconductor ASA
3 * Copyright (c) 2019 Piotr Mienkowski
4 * Copyright (c) 2017 ARM Ltd
5 * Copyright (c) 2015-2016 Intel Corporation.
6 *
7 * SPDX-License-Identifier: Apache-2.0
8 */
9
15#ifndef ZEPHYR_INCLUDE_DRIVERS_GPIO_H_
16#define ZEPHYR_INCLUDE_DRIVERS_GPIO_H_
17
18#include <zephyr/sys/__assert.h>
19#include <zephyr/sys/slist.h>
20
21#include <zephyr/types.h>
22#include <stddef.h>
23#include <zephyr/device.h>
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
40#define GPIO_INT_DEBOUNCE (1U << 8) __DEPRECATED_MACRO
41
47#define GPIO_DS_LOW_POS 9 __DEPRECATED_MACRO
48#define GPIO_DS_LOW_MASK (0x1U << GPIO_DS_LOW_POS) __DEPRECATED_MACRO
49#define GPIO_DS_HIGH_POS 10 __DEPRECATED_MACRO
50#define GPIO_DS_HIGH_MASK (0x1U << GPIO_DS_HIGH_POS) __DEPRECATED_MACRO
51#define GPIO_DS_MASK (GPIO_DS_LOW_MASK | GPIO_DS_HIGH_MASK) __DEPRECATED_MACRO
53#define GPIO_DS_DFLT_LOW (0x0U << GPIO_DS_LOW_POS) __DEPRECATED_MACRO
54#define GPIO_DS_ALT_LOW (0x1U << GPIO_DS_LOW_POS) __DEPRECATED_MACRO
55#define GPIO_DS_DFLT_HIGH (0x0U << GPIO_DS_HIGH_POS) __DEPRECATED_MACRO
56#define GPIO_DS_ALT_HIGH (0x1U << GPIO_DS_HIGH_POS) __DEPRECATED_MACRO
57#define GPIO_DS_DFLT (GPIO_DS_DFLT_LOW | GPIO_DS_DFLT_HIGH) __DEPRECATED_MACRO
58#define GPIO_DS_ALT (GPIO_DS_ALT_LOW | GPIO_DS_ALT_HIGH) __DEPRECATED_MACRO
67#define GPIO_INPUT (1U << 16)
68
70#define GPIO_OUTPUT (1U << 17)
71
73#define GPIO_DISCONNECTED 0
74
77/* Initializes output to a low state. */
78#define GPIO_OUTPUT_INIT_LOW (1U << 18)
79
80/* Initializes output to a high state. */
81#define GPIO_OUTPUT_INIT_HIGH (1U << 19)
82
83/* Initializes output based on logic level */
84#define GPIO_OUTPUT_INIT_LOGICAL (1U << 20)
85
89#define GPIO_OUTPUT_LOW (GPIO_OUTPUT | GPIO_OUTPUT_INIT_LOW)
91#define GPIO_OUTPUT_HIGH (GPIO_OUTPUT | GPIO_OUTPUT_INIT_HIGH)
93#define GPIO_OUTPUT_INACTIVE (GPIO_OUTPUT | \
94 GPIO_OUTPUT_INIT_LOW | \
95 GPIO_OUTPUT_INIT_LOGICAL)
97#define GPIO_OUTPUT_ACTIVE (GPIO_OUTPUT | \
98 GPIO_OUTPUT_INIT_HIGH | \
99 GPIO_OUTPUT_INIT_LOGICAL)
100
115#define GPIO_INT_DISABLE (1U << 21)
116
119/* Enables GPIO pin interrupt. */
120#define GPIO_INT_ENABLE (1U << 22)
121
122/* GPIO interrupt is sensitive to logical levels.
123 *
124 * This is a component flag that should be combined with other
125 * `GPIO_INT_*` flags to produce a meaningful configuration.
126 */
127#define GPIO_INT_LEVELS_LOGICAL (1U << 23)
128
129/* GPIO interrupt is edge sensitive.
130 *
131 * Note: by default interrupts are level sensitive.
132 *
133 * This is a component flag that should be combined with other
134 * `GPIO_INT_*` flags to produce a meaningful configuration.
135 */
136#define GPIO_INT_EDGE (1U << 24)
137
138/* Trigger detection when input state is (or transitions to) physical low or
139 * logical 0 level.
140 *
141 * This is a component flag that should be combined with other
142 * `GPIO_INT_*` flags to produce a meaningful configuration.
143 */
144#define GPIO_INT_LOW_0 (1U << 25)
145
146/* Trigger detection on input state is (or transitions to) physical high or
147 * logical 1 level.
148 *
149 * This is a component flag that should be combined with other
150 * `GPIO_INT_*` flags to produce a meaningful configuration.
151 */
152#define GPIO_INT_HIGH_1 (1U << 26)
153
154#define GPIO_INT_MASK (GPIO_INT_DISABLE | \
155 GPIO_INT_ENABLE | \
156 GPIO_INT_LEVELS_LOGICAL | \
157 GPIO_INT_EDGE | \
158 GPIO_INT_LOW_0 | \
159 GPIO_INT_HIGH_1)
160
165#define GPIO_INT_EDGE_RISING (GPIO_INT_ENABLE | \
166 GPIO_INT_EDGE | \
167 GPIO_INT_HIGH_1)
168
172#define GPIO_INT_EDGE_FALLING (GPIO_INT_ENABLE | \
173 GPIO_INT_EDGE | \
174 GPIO_INT_LOW_0)
175
179#define GPIO_INT_EDGE_BOTH (GPIO_INT_ENABLE | \
180 GPIO_INT_EDGE | \
181 GPIO_INT_LOW_0 | \
182 GPIO_INT_HIGH_1)
183
187#define GPIO_INT_LEVEL_LOW (GPIO_INT_ENABLE | \
188 GPIO_INT_LOW_0)
189
193#define GPIO_INT_LEVEL_HIGH (GPIO_INT_ENABLE | \
194 GPIO_INT_HIGH_1)
195
199#define GPIO_INT_EDGE_TO_INACTIVE (GPIO_INT_ENABLE | \
200 GPIO_INT_LEVELS_LOGICAL | \
201 GPIO_INT_EDGE | \
202 GPIO_INT_LOW_0)
203
207#define GPIO_INT_EDGE_TO_ACTIVE (GPIO_INT_ENABLE | \
208 GPIO_INT_LEVELS_LOGICAL | \
209 GPIO_INT_EDGE | \
210 GPIO_INT_HIGH_1)
211
215#define GPIO_INT_LEVEL_INACTIVE (GPIO_INT_ENABLE | \
216 GPIO_INT_LEVELS_LOGICAL | \
217 GPIO_INT_LOW_0)
218
222#define GPIO_INT_LEVEL_ACTIVE (GPIO_INT_ENABLE | \
223 GPIO_INT_LEVELS_LOGICAL | \
224 GPIO_INT_HIGH_1)
225
229#define GPIO_DIR_MASK (GPIO_INPUT | GPIO_OUTPUT)
239
252
260
272
280
295 const struct device *port;
300};
301
336#define GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, idx) \
337 { \
338 .port = DEVICE_DT_GET(DT_GPIO_CTLR_BY_IDX(node_id, prop, idx)),\
339 .pin = DT_GPIO_PIN_BY_IDX(node_id, prop, idx), \
340 .dt_flags = DT_GPIO_FLAGS_BY_IDX(node_id, prop, idx), \
341 }
342
360#define GPIO_DT_SPEC_GET_BY_IDX_OR(node_id, prop, idx, default_value) \
361 COND_CODE_1(DT_NODE_HAS_PROP(node_id, prop), \
362 (GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, idx)), \
363 (default_value))
364
373#define GPIO_DT_SPEC_GET(node_id, prop) \
374 GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, 0)
375
386#define GPIO_DT_SPEC_GET_OR(node_id, prop, default_value) \
387 GPIO_DT_SPEC_GET_BY_IDX_OR(node_id, prop, 0, default_value)
388
399#define GPIO_DT_SPEC_INST_GET_BY_IDX(inst, prop, idx) \
400 GPIO_DT_SPEC_GET_BY_IDX(DT_DRV_INST(inst), prop, idx)
401
413#define GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, prop, idx, default_value) \
414 GPIO_DT_SPEC_GET_BY_IDX_OR(DT_DRV_INST(inst), prop, idx, default_value)
415
424#define GPIO_DT_SPEC_INST_GET(inst, prop) \
425 GPIO_DT_SPEC_INST_GET_BY_IDX(inst, prop, 0)
426
437#define GPIO_DT_SPEC_INST_GET_OR(inst, prop, default_value) \
438 GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, prop, 0, default_value)
439
443#define GPIO_MAX_PINS_PER_PORT (sizeof(gpio_port_pins_t) * __CHAR_BIT__)
444
451 /* Mask identifying pins supported by the controller.
452 *
453 * Initialization of this mask is the responsibility of device
454 * instance generation in the driver.
455 */
457};
458
464 /* Mask identifying pins that are configured as active low.
465 *
466 * Management of this mask is the responsibility of the
467 * wrapper functions in this header.
468 */
470};
471
472struct gpio_callback;
473
486typedef void (*gpio_callback_handler_t)(const struct device *port,
487 struct gpio_callback *cb,
488 gpio_port_pins_t pins);
489
505
508
516};
517
524/* Used by driver api function pin_interrupt_configure, these are defined
525 * in terms of the public flags so we can just mask and pass them
526 * through to the driver api
527 */
528enum gpio_int_mode {
529 GPIO_INT_MODE_DISABLED = GPIO_INT_DISABLE,
530 GPIO_INT_MODE_LEVEL = GPIO_INT_ENABLE,
531 GPIO_INT_MODE_EDGE = GPIO_INT_ENABLE | GPIO_INT_EDGE,
532};
533
534enum gpio_int_trig {
535 /* Trigger detection when input state is (or transitions to)
536 * physical low. (Edge Failing or Active Low) */
537 GPIO_INT_TRIG_LOW = GPIO_INT_LOW_0,
538 /* Trigger detection when input state is (or transitions to)
539 * physical high. (Edge Rising or Active High) */
540 GPIO_INT_TRIG_HIGH = GPIO_INT_HIGH_1,
541 /* Trigger detection on pin rising or falling edge. */
542 GPIO_INT_TRIG_BOTH = GPIO_INT_LOW_0 | GPIO_INT_HIGH_1,
543};
544
545__subsystem struct gpio_driver_api {
546 int (*pin_configure)(const struct device *port, gpio_pin_t pin,
548 int (*port_get_raw)(const struct device *port,
549 gpio_port_value_t *value);
550 int (*port_set_masked_raw)(const struct device *port,
551 gpio_port_pins_t mask,
552 gpio_port_value_t value);
553 int (*port_set_bits_raw)(const struct device *port,
554 gpio_port_pins_t pins);
555 int (*port_clear_bits_raw)(const struct device *port,
556 gpio_port_pins_t pins);
557 int (*port_toggle_bits)(const struct device *port,
558 gpio_port_pins_t pins);
559 int (*pin_interrupt_configure)(const struct device *port,
560 gpio_pin_t pin,
561 enum gpio_int_mode, enum gpio_int_trig);
562 int (*manage_callback)(const struct device *port,
563 struct gpio_callback *cb,
564 bool set);
565 uint32_t (*get_pending_int)(const struct device *dev);
566};
567
592__syscall int gpio_pin_interrupt_configure(const struct device *port,
593 gpio_pin_t pin,
595
596static inline int z_impl_gpio_pin_interrupt_configure(const struct device *port,
597 gpio_pin_t pin,
599{
600 const struct gpio_driver_api *api =
601 (const struct gpio_driver_api *)port->api;
602 const struct gpio_driver_config *const cfg =
603 (const struct gpio_driver_config *)port->config;
604 const struct gpio_driver_data *const data =
605 (const struct gpio_driver_data *)port->data;
606 enum gpio_int_trig trig;
607 enum gpio_int_mode mode;
608
609 __ASSERT((flags & (GPIO_INT_DISABLE | GPIO_INT_ENABLE))
610 != (GPIO_INT_DISABLE | GPIO_INT_ENABLE),
611 "Cannot both enable and disable interrupts");
612
613 __ASSERT((flags & (GPIO_INT_DISABLE | GPIO_INT_ENABLE)) != 0U,
614 "Must either enable or disable interrupts");
615
616 __ASSERT(((flags & GPIO_INT_ENABLE) == 0) ||
617 ((flags & GPIO_INT_EDGE) != 0) ||
618 ((flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)) !=
619 (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)),
620 "Only one of GPIO_INT_LOW_0, GPIO_INT_HIGH_1 can be "
621 "enabled for a level interrupt.");
622
623 __ASSERT(((flags & GPIO_INT_ENABLE) == 0) ||
624 ((flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)) != 0),
625 "At least one of GPIO_INT_LOW_0, GPIO_INT_HIGH_1 has to be "
626 "enabled.");
627
628 (void)cfg;
629 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
630 "Unsupported pin");
631
632 if (((flags & GPIO_INT_LEVELS_LOGICAL) != 0) &&
633 ((data->invert & (gpio_port_pins_t)BIT(pin)) != 0)) {
634 /* Invert signal bits */
635 flags ^= (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1);
636 }
637
638 trig = (enum gpio_int_trig)(flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1));
639 mode = (enum gpio_int_mode)(flags & (GPIO_INT_EDGE | GPIO_INT_DISABLE | GPIO_INT_ENABLE));
640
641 return api->pin_interrupt_configure(port, pin, mode, trig);
642}
643
657static inline int gpio_pin_interrupt_configure_dt(const struct gpio_dt_spec *spec,
659{
660 return gpio_pin_interrupt_configure(spec->port, spec->pin, flags);
661}
662
678__syscall int gpio_pin_configure(const struct device *port,
679 gpio_pin_t pin,
681
682static inline int z_impl_gpio_pin_configure(const struct device *port,
683 gpio_pin_t pin,
685{
686 const struct gpio_driver_api *api =
687 (const struct gpio_driver_api *)port->api;
688 const struct gpio_driver_config *const cfg =
689 (const struct gpio_driver_config *)port->config;
690 struct gpio_driver_data *data =
691 (struct gpio_driver_data *)port->data;
692
693 __ASSERT((flags & GPIO_INT_MASK) == 0,
694 "Interrupt flags are not supported");
695
696 __ASSERT((flags & (GPIO_PULL_UP | GPIO_PULL_DOWN)) !=
698 "Pull Up and Pull Down should not be enabled simultaneously");
699
700 __ASSERT((flags & GPIO_OUTPUT) != 0 || (flags & GPIO_SINGLE_ENDED) == 0,
701 "Output needs to be enabled for 'Open Drain', 'Open Source' "
702 "mode to be supported");
703
704 __ASSERT_NO_MSG((flags & GPIO_SINGLE_ENDED) != 0 ||
705 (flags & GPIO_LINE_OPEN_DRAIN) == 0);
706
707 __ASSERT((flags & (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH)) == 0
708 || (flags & GPIO_OUTPUT) != 0,
709 "Output needs to be enabled to be initialized low or high");
710
711 __ASSERT((flags & (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH))
712 != (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH),
713 "Output cannot be initialized low and high");
714
715 if (((flags & GPIO_OUTPUT_INIT_LOGICAL) != 0)
716 && ((flags & (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH)) != 0)
717 && ((flags & GPIO_ACTIVE_LOW) != 0)) {
718 flags ^= GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH;
719 }
720
721 flags &= ~GPIO_OUTPUT_INIT_LOGICAL;
722
723 (void)cfg;
724 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
725 "Unsupported pin");
726
727 if ((flags & GPIO_ACTIVE_LOW) != 0) {
728 data->invert |= (gpio_port_pins_t)BIT(pin);
729 } else {
730 data->invert &= ~(gpio_port_pins_t)BIT(pin);
731 }
732
733 return api->pin_configure(port, pin, flags);
734}
735
747static inline int gpio_pin_configure_dt(const struct gpio_dt_spec *spec,
748 gpio_flags_t extra_flags)
749{
750 return gpio_pin_configure(spec->port,
751 spec->pin,
752 spec->dt_flags | extra_flags);
753}
754
772__syscall int gpio_port_get_raw(const struct device *port,
773 gpio_port_value_t *value);
774
775static inline int z_impl_gpio_port_get_raw(const struct device *port,
776 gpio_port_value_t *value)
777{
778 const struct gpio_driver_api *api =
779 (const struct gpio_driver_api *)port->api;
780
781 return api->port_get_raw(port, value);
782}
783
802static inline int gpio_port_get(const struct device *port,
803 gpio_port_value_t *value)
804{
805 const struct gpio_driver_data *const data =
806 (const struct gpio_driver_data *)port->data;
807 int ret;
808
809 ret = gpio_port_get_raw(port, value);
810 if (ret == 0) {
811 *value ^= data->invert;
812 }
813
814 return ret;
815}
816
834__syscall int gpio_port_set_masked_raw(const struct device *port,
835 gpio_port_pins_t mask,
836 gpio_port_value_t value);
837
838static inline int z_impl_gpio_port_set_masked_raw(const struct device *port,
839 gpio_port_pins_t mask,
840 gpio_port_value_t value)
841{
842 const struct gpio_driver_api *api =
843 (const struct gpio_driver_api *)port->api;
844
845 return api->port_set_masked_raw(port, mask, value);
846}
847
868static inline int gpio_port_set_masked(const struct device *port,
869 gpio_port_pins_t mask,
870 gpio_port_value_t value)
871{
872 const struct gpio_driver_data *const data =
873 (const struct gpio_driver_data *)port->data;
874
875 value ^= data->invert;
876
877 return gpio_port_set_masked_raw(port, mask, value);
878}
879
890__syscall int gpio_port_set_bits_raw(const struct device *port,
891 gpio_port_pins_t pins);
892
893static inline int z_impl_gpio_port_set_bits_raw(const struct device *port,
894 gpio_port_pins_t pins)
895{
896 const struct gpio_driver_api *api =
897 (const struct gpio_driver_api *)port->api;
898
899 return api->port_set_bits_raw(port, pins);
900}
901
912static inline int gpio_port_set_bits(const struct device *port,
913 gpio_port_pins_t pins)
914{
915 return gpio_port_set_masked(port, pins, pins);
916}
917
928__syscall int gpio_port_clear_bits_raw(const struct device *port,
929 gpio_port_pins_t pins);
930
931static inline int z_impl_gpio_port_clear_bits_raw(const struct device *port,
932 gpio_port_pins_t pins)
933{
934 const struct gpio_driver_api *api =
935 (const struct gpio_driver_api *)port->api;
936
937 return api->port_clear_bits_raw(port, pins);
938}
939
950static inline int gpio_port_clear_bits(const struct device *port,
951 gpio_port_pins_t pins)
952{
953 return gpio_port_set_masked(port, pins, 0);
954}
955
966__syscall int gpio_port_toggle_bits(const struct device *port,
967 gpio_port_pins_t pins);
968
969static inline int z_impl_gpio_port_toggle_bits(const struct device *port,
970 gpio_port_pins_t pins)
971{
972 const struct gpio_driver_api *api =
973 (const struct gpio_driver_api *)port->api;
974
975 return api->port_toggle_bits(port, pins);
976}
977
989static inline int gpio_port_set_clr_bits_raw(const struct device *port,
990 gpio_port_pins_t set_pins,
991 gpio_port_pins_t clear_pins)
992{
993 __ASSERT((set_pins & clear_pins) == 0, "Set and Clear pins overlap");
994
995 return gpio_port_set_masked_raw(port, set_pins | clear_pins, set_pins);
996}
997
1009static inline int gpio_port_set_clr_bits(const struct device *port,
1010 gpio_port_pins_t set_pins,
1011 gpio_port_pins_t clear_pins)
1012{
1013 __ASSERT((set_pins & clear_pins) == 0, "Set and Clear pins overlap");
1014
1015 return gpio_port_set_masked(port, set_pins | clear_pins, set_pins);
1016}
1017
1033static inline int gpio_pin_get_raw(const struct device *port, gpio_pin_t pin)
1034{
1035 const struct gpio_driver_config *const cfg =
1036 (const struct gpio_driver_config *)port->config;
1037 gpio_port_value_t value;
1038 int ret;
1039
1040 (void)cfg;
1041 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1042 "Unsupported pin");
1043
1044 ret = gpio_port_get_raw(port, &value);
1045 if (ret == 0) {
1046 ret = (value & (gpio_port_pins_t)BIT(pin)) != 0 ? 1 : 0;
1047 }
1048
1049 return ret;
1050}
1051
1071static inline int gpio_pin_get(const struct device *port, gpio_pin_t pin)
1072{
1073 const struct gpio_driver_config *const cfg =
1074 (const struct gpio_driver_config *)port->config;
1075 gpio_port_value_t value;
1076 int ret;
1077
1078 (void)cfg;
1079 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1080 "Unsupported pin");
1081
1082 ret = gpio_port_get(port, &value);
1083 if (ret == 0) {
1084 ret = (value & (gpio_port_pins_t)BIT(pin)) != 0 ? 1 : 0;
1085 }
1086
1087 return ret;
1088}
1089
1100static inline int gpio_pin_get_dt(const struct gpio_dt_spec *spec)
1101{
1102 return gpio_pin_get(spec->port, spec->pin);
1103}
1104
1120static inline int gpio_pin_set_raw(const struct device *port, gpio_pin_t pin,
1121 int value)
1122{
1123 const struct gpio_driver_config *const cfg =
1124 (const struct gpio_driver_config *)port->config;
1125 int ret;
1126
1127 (void)cfg;
1128 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1129 "Unsupported pin");
1130
1131 if (value != 0) {
1133 } else {
1135 }
1136
1137 return ret;
1138}
1139
1161static inline int gpio_pin_set(const struct device *port, gpio_pin_t pin,
1162 int value)
1163{
1164 const struct gpio_driver_config *const cfg =
1165 (const struct gpio_driver_config *)port->config;
1166 const struct gpio_driver_data *const data =
1167 (const struct gpio_driver_data *)port->data;
1168
1169 (void)cfg;
1170 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1171 "Unsupported pin");
1172
1173 if (data->invert & (gpio_port_pins_t)BIT(pin)) {
1174 value = (value != 0) ? 0 : 1;
1175 }
1176
1177 return gpio_pin_set_raw(port, pin, value);
1178}
1179
1191static inline int gpio_pin_set_dt(const struct gpio_dt_spec *spec, int value)
1192{
1193 return gpio_pin_set(spec->port, spec->pin, value);
1194}
1195
1206static inline int gpio_pin_toggle(const struct device *port, gpio_pin_t pin)
1207{
1208 const struct gpio_driver_config *const cfg =
1209 (const struct gpio_driver_config *)port->config;
1210
1211 (void)cfg;
1212 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1213 "Unsupported pin");
1214
1215 return gpio_port_toggle_bits(port, (gpio_port_pins_t)BIT(pin));
1216}
1217
1228static inline int gpio_pin_toggle_dt(const struct gpio_dt_spec *spec)
1229{
1230 return gpio_pin_toggle(spec->port, spec->pin);
1231}
1232
1239static inline void gpio_init_callback(struct gpio_callback *callback,
1241 gpio_port_pins_t pin_mask)
1242{
1243 __ASSERT(callback, "Callback pointer should not be NULL");
1244 __ASSERT(handler, "Callback handler pointer should not be NULL");
1245
1246 callback->handler = handler;
1247 callback->pin_mask = pin_mask;
1248}
1249
1262static inline int gpio_add_callback(const struct device *port,
1263 struct gpio_callback *callback)
1264{
1265 const struct gpio_driver_api *api =
1266 (const struct gpio_driver_api *)port->api;
1267
1268 if (api->manage_callback == NULL) {
1269 return -ENOTSUP;
1270 }
1271
1272 return api->manage_callback(port, callback, true);
1273}
1274
1291static inline int gpio_remove_callback(const struct device *port,
1292 struct gpio_callback *callback)
1293{
1294 const struct gpio_driver_api *api =
1295 (const struct gpio_driver_api *)port->api;
1296
1297 if (api->manage_callback == NULL) {
1298 return -ENOTSUP;
1299 }
1300
1301 return api->manage_callback(port, callback, false);
1302}
1303
1317__syscall int gpio_get_pending_int(const struct device *dev);
1318
1319static inline int z_impl_gpio_get_pending_int(const struct device *dev)
1320{
1321 const struct gpio_driver_api *api =
1322 (const struct gpio_driver_api *)dev->api;
1323
1324 if (api->get_pending_int == NULL) {
1325 return -ENOTSUP;
1326 }
1327
1328 return api->get_pending_int(dev);
1329}
1330
1335#ifdef __cplusplus
1336}
1337#endif
1338
1339#include <syscalls/gpio.h>
1340
1341#endif /* ZEPHYR_INCLUDE_DRIVERS_GPIO_H_ */
static int gpio_add_callback(const struct device *port, struct gpio_callback *callback)
Add an application callback.
Definition: gpio.h:1262
#define GPIO_OUTPUT
Definition: gpio.h:70
static int gpio_pin_get_raw(const struct device *port, gpio_pin_t pin)
Get physical level of an input pin.
Definition: gpio.h:1033
static int gpio_pin_get(const struct device *port, gpio_pin_t pin)
Get logical level of an input pin.
Definition: gpio.h:1071
int gpio_port_set_bits_raw(const struct device *port, gpio_port_pins_t pins)
Set physical level of selected output pins to high.
static int gpio_pin_interrupt_configure_dt(const struct gpio_dt_spec *spec, gpio_flags_t flags)
Configure pin interrupts from a gpio_dt_spec.
Definition: gpio.h:657
void(* gpio_callback_handler_t)(const struct device *port, struct gpio_callback *cb, gpio_port_pins_t pins)
Define the application callback handler function signature.
Definition: gpio.h:486
static int gpio_pin_toggle_dt(const struct gpio_dt_spec *spec)
Toggle pin level from a gpio_dt_spec.
Definition: gpio.h:1228
uint8_t gpio_pin_t
Provides a type to hold a GPIO pin index.
Definition: gpio.h:259
int gpio_get_pending_int(const struct device *dev)
Function to get pending interrupts.
static int gpio_pin_configure_dt(const struct gpio_dt_spec *spec, gpio_flags_t extra_flags)
Configure a single pin from a gpio_dt_spec and some extra flags.
Definition: gpio.h:747
static int gpio_pin_set_dt(const struct gpio_dt_spec *spec, int value)
Set logical level of a output pin from a gpio_dt_spec.
Definition: gpio.h:1191
static int gpio_port_set_bits(const struct device *port, gpio_port_pins_t pins)
Set logical level of selected output pins to active.
Definition: gpio.h:912
uint32_t gpio_flags_t
Provides a type to hold GPIO configuration flags.
Definition: gpio.h:279
#define GPIO_ACTIVE_LOW
Definition: gpio.h:23
static int gpio_port_set_clr_bits_raw(const struct device *port, gpio_port_pins_t set_pins, gpio_port_pins_t clear_pins)
Set physical level of selected output pins.
Definition: gpio.h:989
static int gpio_port_set_clr_bits(const struct device *port, gpio_port_pins_t set_pins, gpio_port_pins_t clear_pins)
Set logical level of selected output pins.
Definition: gpio.h:1009
static void gpio_init_callback(struct gpio_callback *callback, gpio_callback_handler_t handler, gpio_port_pins_t pin_mask)
Helper to initialize a struct gpio_callback properly.
Definition: gpio.h:1239
uint32_t gpio_port_pins_t
Identifies a set of pins associated with a port.
Definition: gpio.h:238
int gpio_port_toggle_bits(const struct device *port, gpio_port_pins_t pins)
Toggle level of selected output pins.
#define GPIO_INT_DISABLE
Definition: gpio.h:115
int gpio_pin_interrupt_configure(const struct device *port, gpio_pin_t pin, gpio_flags_t flags)
Configure pin interrupt.
int gpio_port_clear_bits_raw(const struct device *port, gpio_port_pins_t pins)
Set physical level of selected output pins to low.
int gpio_port_set_masked_raw(const struct device *port, gpio_port_pins_t mask, gpio_port_value_t value)
Set physical level of output pins in a port.
#define GPIO_PULL_UP
Definition: gpio.h:72
static int gpio_pin_get_dt(const struct gpio_dt_spec *spec)
Get logical level of an input pin from a gpio_dt_spec.
Definition: gpio.h:1100
static int gpio_pin_toggle(const struct device *port, gpio_pin_t pin)
Toggle pin level.
Definition: gpio.h:1206
uint32_t gpio_port_value_t
Provides values for a set of pins associated with a port.
Definition: gpio.h:251
static int gpio_pin_set(const struct device *port, gpio_pin_t pin, int value)
Set logical level of an output pin.
Definition: gpio.h:1161
static int gpio_port_clear_bits(const struct device *port, gpio_port_pins_t pins)
Set logical level of selected output pins to inactive.
Definition: gpio.h:950
static int gpio_remove_callback(const struct device *port, struct gpio_callback *callback)
Remove an application callback.
Definition: gpio.h:1291
static int gpio_port_set_masked(const struct device *port, gpio_port_pins_t mask, gpio_port_value_t value)
Set logical level of output pins in a port.
Definition: gpio.h:868
uint16_t gpio_dt_flags_t
Provides a type to hold GPIO devicetree flags.
Definition: gpio.h:271
#define GPIO_PULL_DOWN
Definition: gpio.h:75
static int gpio_pin_set_raw(const struct device *port, gpio_pin_t pin, int value)
Set physical level of an output pin.
Definition: gpio.h:1120
int gpio_port_get_raw(const struct device *port, gpio_port_value_t *value)
Get physical level of all input pins in a port.
static int gpio_port_get(const struct device *port, gpio_port_value_t *value)
Get logical level of all input pins in a port.
Definition: gpio.h:802
int gpio_pin_configure(const struct device *port, gpio_pin_t pin, gpio_flags_t flags)
Configure a single pin.
#define BIT(n)
Unsigned integer with bit position n set (signed in assembly language).
Definition: util_macro.h:44
#define ENOTSUP
Definition: errno.h:115
flags
Definition: http_parser.h:131
static ZTEST_BMEM volatile int ret
Definition: k_float_disable.c:28
Single-linked list implementation.
struct _snode sys_snode_t
Definition: slist.h:33
__UINT32_TYPE__ uint32_t
Definition: stdint.h:90
__UINT8_TYPE__ uint8_t
Definition: stdint.h:88
__UINT16_TYPE__ uint16_t
Definition: stdint.h:89
Runtime device structure (in ROM) per driver instance.
Definition: device.h:456
const void * api
Definition: device.h:462
void *const data
Definition: device.h:466
const void * config
Definition: device.h:460
GPIO callback structure.
Definition: gpio.h:500
sys_snode_t node
Definition: gpio.h:504
gpio_port_pins_t pin_mask
Definition: gpio.h:515
gpio_callback_handler_t handler
Definition: gpio.h:507
Definition: gpio.h:450
gpio_port_pins_t port_pin_mask
Definition: gpio.h:456
Definition: gpio.h:463
gpio_port_pins_t invert
Definition: gpio.h:469
Container for GPIO pin information specified in devicetree.
Definition: gpio.h:293
const struct device * port
Definition: gpio.h:295
gpio_pin_t pin
Definition: gpio.h:297
gpio_dt_flags_t dt_flags
Definition: gpio.h:299
static fdata_t data[2]
Definition: test_fifo_contexts.c:15
static void handler(struct k_timer *timer)
Definition: main.c:19