16#ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_ARCH_H_
17#define ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_ARCH_H_
23#define sys_define_gpr_with_alias(name1, name2) union { uint32_t name1, name2; }
36#ifdef CONFIG_CPU_CORTEX_M
40#elif defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
43#if defined(CONFIG_AARCH32_ARMV8_R)
62#ifdef CONFIG_STACK_ALIGN_DOUBLE_WORD
63#define ARCH_STACK_PTR_ALIGN 8
65#define ARCH_STACK_PTR_ALIGN 4
77#if defined(CONFIG_USERSPACE)
78#define Z_THREAD_MIN_STACK_ALIGN CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
79#elif defined(CONFIG_ARM_AARCH32_MMU)
80#define Z_THREAD_MIN_STACK_ALIGN CONFIG_ARM_MMU_REGION_MIN_ALIGN_AND_SIZE
82#define Z_THREAD_MIN_STACK_ALIGN ARCH_STACK_PTR_ALIGN
132#if defined(CONFIG_MPU_STACK_GUARD)
134#if CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE <= 0x20
135#define MPU_GUARD_ALIGN_AND_SIZE 0x40
137#define MPU_GUARD_ALIGN_AND_SIZE CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
140#define MPU_GUARD_ALIGN_AND_SIZE 0
153#if defined(CONFIG_FPU) && defined(CONFIG_FPU_SHARING) \
154 && defined(CONFIG_MPU_STACK_GUARD)
155#if CONFIG_MPU_STACK_GUARD_MIN_SIZE_FLOAT <= 0x20
156#define MPU_GUARD_ALIGN_AND_SIZE_FLOAT 0x40
158#define MPU_GUARD_ALIGN_AND_SIZE_FLOAT CONFIG_MPU_STACK_GUARD_MIN_SIZE_FLOAT
161#define MPU_GUARD_ALIGN_AND_SIZE_FLOAT 0
171#if defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
172#define Z_MPU_GUARD_ALIGN (MAX(MPU_GUARD_ALIGN_AND_SIZE, \
173 MPU_GUARD_ALIGN_AND_SIZE_FLOAT))
175#define Z_MPU_GUARD_ALIGN MPU_GUARD_ALIGN_AND_SIZE
178#if defined(CONFIG_USERSPACE) && \
179 defined(CONFIG_MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT)
185#define ARCH_THREAD_STACK_OBJ_ALIGN(size) Z_POW2_CEIL(size)
186#define ARCH_THREAD_STACK_SIZE_ADJUST(size) Z_POW2_CEIL(size)
188#define ARCH_THREAD_STACK_OBJ_ALIGN(size) MAX(Z_THREAD_MIN_STACK_ALIGN, \
190#ifdef CONFIG_USERSPACE
191#define ARCH_THREAD_STACK_SIZE_ADJUST(size) \
192 ROUND_UP(size, CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE)
196#ifdef CONFIG_MPU_STACK_GUARD
200#define ARCH_KERNEL_STACK_RESERVED MPU_GUARD_ALIGN_AND_SIZE
201#define ARCH_KERNEL_STACK_OBJ_ALIGN Z_MPU_GUARD_ALIGN
205#define ARCH_THREAD_STACK_RESERVED 0
209#ifdef CONFIG_CPU_HAS_ARM_MPU
212#ifdef CONFIG_CPU_HAS_NXP_MPU
216#ifdef CONFIG_ARM_AARCH32_MMU
ARM AArch32 public interrupt handling.
Per-arch thread definition.
ARM AArch32 public error handling.
ARM AArch32 public exception handling.
ARM AArch32 public kernel miscellaneous.
ARM AArch32 NMI routines.