Zephyr Project API  3.2.0
A Scalable Open Source RTOS
gpio.h
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1/*
2 * Copyright (c) 2019-2020 Nordic Semiconductor ASA
3 * Copyright (c) 2019 Piotr Mienkowski
4 * Copyright (c) 2017 ARM Ltd
5 * Copyright (c) 2015-2016 Intel Corporation.
6 *
7 * SPDX-License-Identifier: Apache-2.0
8 */
9
15#ifndef ZEPHYR_INCLUDE_DRIVERS_GPIO_H_
16#define ZEPHYR_INCLUDE_DRIVERS_GPIO_H_
17
18#include <zephyr/sys/__assert.h>
19#include <zephyr/sys/slist.h>
20
21#include <zephyr/types.h>
22#include <stddef.h>
23#include <zephyr/device.h>
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
40#define GPIO_INT_DEBOUNCE (1U << 8) __DEPRECATED_MACRO
41
47#define GPIO_DS_LOW_POS 9 __DEPRECATED_MACRO
48#define GPIO_DS_LOW_MASK (0x1U << GPIO_DS_LOW_POS) __DEPRECATED_MACRO
49#define GPIO_DS_HIGH_POS 10 __DEPRECATED_MACRO
50#define GPIO_DS_HIGH_MASK (0x1U << GPIO_DS_HIGH_POS) __DEPRECATED_MACRO
51#define GPIO_DS_MASK (GPIO_DS_LOW_MASK | GPIO_DS_HIGH_MASK) __DEPRECATED_MACRO
53#define GPIO_DS_DFLT_LOW (0x0U << GPIO_DS_LOW_POS) __DEPRECATED_MACRO
54#define GPIO_DS_ALT_LOW (0x1U << GPIO_DS_LOW_POS) __DEPRECATED_MACRO
55#define GPIO_DS_DFLT_HIGH (0x0U << GPIO_DS_HIGH_POS) __DEPRECATED_MACRO
56#define GPIO_DS_ALT_HIGH (0x1U << GPIO_DS_HIGH_POS) __DEPRECATED_MACRO
57#define GPIO_DS_DFLT (GPIO_DS_DFLT_LOW | GPIO_DS_DFLT_HIGH) __DEPRECATED_MACRO
58#define GPIO_DS_ALT (GPIO_DS_ALT_LOW | GPIO_DS_ALT_HIGH) __DEPRECATED_MACRO
67#define GPIO_INPUT (1U << 16)
68
70#define GPIO_OUTPUT (1U << 17)
71
73#define GPIO_DISCONNECTED 0
74
77/* Initializes output to a low state. */
78#define GPIO_OUTPUT_INIT_LOW (1U << 18)
79
80/* Initializes output to a high state. */
81#define GPIO_OUTPUT_INIT_HIGH (1U << 19)
82
83/* Initializes output based on logic level */
84#define GPIO_OUTPUT_INIT_LOGICAL (1U << 20)
85
89#define GPIO_OUTPUT_LOW (GPIO_OUTPUT | GPIO_OUTPUT_INIT_LOW)
91#define GPIO_OUTPUT_HIGH (GPIO_OUTPUT | GPIO_OUTPUT_INIT_HIGH)
93#define GPIO_OUTPUT_INACTIVE (GPIO_OUTPUT | \
94 GPIO_OUTPUT_INIT_LOW | \
95 GPIO_OUTPUT_INIT_LOGICAL)
97#define GPIO_OUTPUT_ACTIVE (GPIO_OUTPUT | \
98 GPIO_OUTPUT_INIT_HIGH | \
99 GPIO_OUTPUT_INIT_LOGICAL)
100
115#define GPIO_INT_DISABLE (1U << 21)
116
119/* Enables GPIO pin interrupt. */
120#define GPIO_INT_ENABLE (1U << 22)
121
122/* GPIO interrupt is sensitive to logical levels.
123 *
124 * This is a component flag that should be combined with other
125 * `GPIO_INT_*` flags to produce a meaningful configuration.
126 */
127#define GPIO_INT_LEVELS_LOGICAL (1U << 23)
128
129/* GPIO interrupt is edge sensitive.
130 *
131 * Note: by default interrupts are level sensitive.
132 *
133 * This is a component flag that should be combined with other
134 * `GPIO_INT_*` flags to produce a meaningful configuration.
135 */
136#define GPIO_INT_EDGE (1U << 24)
137
138/* Trigger detection when input state is (or transitions to) physical low or
139 * logical 0 level.
140 *
141 * This is a component flag that should be combined with other
142 * `GPIO_INT_*` flags to produce a meaningful configuration.
143 */
144#define GPIO_INT_LOW_0 (1U << 25)
145
146/* Trigger detection on input state is (or transitions to) physical high or
147 * logical 1 level.
148 *
149 * This is a component flag that should be combined with other
150 * `GPIO_INT_*` flags to produce a meaningful configuration.
151 */
152#define GPIO_INT_HIGH_1 (1U << 26)
153
154#define GPIO_INT_MASK (GPIO_INT_DISABLE | \
155 GPIO_INT_ENABLE | \
156 GPIO_INT_LEVELS_LOGICAL | \
157 GPIO_INT_EDGE | \
158 GPIO_INT_LOW_0 | \
159 GPIO_INT_HIGH_1)
160
165#define GPIO_INT_EDGE_RISING (GPIO_INT_ENABLE | \
166 GPIO_INT_EDGE | \
167 GPIO_INT_HIGH_1)
168
172#define GPIO_INT_EDGE_FALLING (GPIO_INT_ENABLE | \
173 GPIO_INT_EDGE | \
174 GPIO_INT_LOW_0)
175
179#define GPIO_INT_EDGE_BOTH (GPIO_INT_ENABLE | \
180 GPIO_INT_EDGE | \
181 GPIO_INT_LOW_0 | \
182 GPIO_INT_HIGH_1)
183
187#define GPIO_INT_LEVEL_LOW (GPIO_INT_ENABLE | \
188 GPIO_INT_LOW_0)
189
193#define GPIO_INT_LEVEL_HIGH (GPIO_INT_ENABLE | \
194 GPIO_INT_HIGH_1)
195
199#define GPIO_INT_EDGE_TO_INACTIVE (GPIO_INT_ENABLE | \
200 GPIO_INT_LEVELS_LOGICAL | \
201 GPIO_INT_EDGE | \
202 GPIO_INT_LOW_0)
203
207#define GPIO_INT_EDGE_TO_ACTIVE (GPIO_INT_ENABLE | \
208 GPIO_INT_LEVELS_LOGICAL | \
209 GPIO_INT_EDGE | \
210 GPIO_INT_HIGH_1)
211
215#define GPIO_INT_LEVEL_INACTIVE (GPIO_INT_ENABLE | \
216 GPIO_INT_LEVELS_LOGICAL | \
217 GPIO_INT_LOW_0)
218
222#define GPIO_INT_LEVEL_ACTIVE (GPIO_INT_ENABLE | \
223 GPIO_INT_LEVELS_LOGICAL | \
224 GPIO_INT_HIGH_1)
225
229#define GPIO_DIR_MASK (GPIO_INPUT | GPIO_OUTPUT)
239
252
260
272
280
295 const struct device *port;
300};
301
336#define GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, idx) \
337 { \
338 .port = DEVICE_DT_GET(DT_GPIO_CTLR_BY_IDX(node_id, prop, idx)),\
339 .pin = DT_GPIO_PIN_BY_IDX(node_id, prop, idx), \
340 .dt_flags = DT_GPIO_FLAGS_BY_IDX(node_id, prop, idx), \
341 }
342
360#define GPIO_DT_SPEC_GET_BY_IDX_OR(node_id, prop, idx, default_value) \
361 COND_CODE_1(DT_NODE_HAS_PROP(node_id, prop), \
362 (GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, idx)), \
363 (default_value))
364
373#define GPIO_DT_SPEC_GET(node_id, prop) \
374 GPIO_DT_SPEC_GET_BY_IDX(node_id, prop, 0)
375
386#define GPIO_DT_SPEC_GET_OR(node_id, prop, default_value) \
387 GPIO_DT_SPEC_GET_BY_IDX_OR(node_id, prop, 0, default_value)
388
399#define GPIO_DT_SPEC_INST_GET_BY_IDX(inst, prop, idx) \
400 GPIO_DT_SPEC_GET_BY_IDX(DT_DRV_INST(inst), prop, idx)
401
413#define GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, prop, idx, default_value) \
414 GPIO_DT_SPEC_GET_BY_IDX_OR(DT_DRV_INST(inst), prop, idx, default_value)
415
424#define GPIO_DT_SPEC_INST_GET(inst, prop) \
425 GPIO_DT_SPEC_INST_GET_BY_IDX(inst, prop, 0)
426
437#define GPIO_DT_SPEC_INST_GET_OR(inst, prop, default_value) \
438 GPIO_DT_SPEC_INST_GET_BY_IDX_OR(inst, prop, 0, default_value)
439
443#define GPIO_MAX_PINS_PER_PORT (sizeof(gpio_port_pins_t) * __CHAR_BIT__)
444
451 /* Mask identifying pins supported by the controller.
452 *
453 * Initialization of this mask is the responsibility of device
454 * instance generation in the driver.
455 */
457};
458
464 /* Mask identifying pins that are configured as active low.
465 *
466 * Management of this mask is the responsibility of the
467 * wrapper functions in this header.
468 */
470};
471
472struct gpio_callback;
473
486typedef void (*gpio_callback_handler_t)(const struct device *port,
487 struct gpio_callback *cb,
488 gpio_port_pins_t pins);
489
505
508
516};
517
524/* Used by driver api function pin_interrupt_configure, these are defined
525 * in terms of the public flags so we can just mask and pass them
526 * through to the driver api
527 */
528enum gpio_int_mode {
529 GPIO_INT_MODE_DISABLED = GPIO_INT_DISABLE,
530 GPIO_INT_MODE_LEVEL = GPIO_INT_ENABLE,
531 GPIO_INT_MODE_EDGE = GPIO_INT_ENABLE | GPIO_INT_EDGE,
532};
533
534enum gpio_int_trig {
535 /* Trigger detection when input state is (or transitions to)
536 * physical low. (Edge Failing or Active Low) */
537 GPIO_INT_TRIG_LOW = GPIO_INT_LOW_0,
538 /* Trigger detection when input state is (or transitions to)
539 * physical high. (Edge Rising or Active High) */
540 GPIO_INT_TRIG_HIGH = GPIO_INT_HIGH_1,
541 /* Trigger detection on pin rising or falling edge. */
542 GPIO_INT_TRIG_BOTH = GPIO_INT_LOW_0 | GPIO_INT_HIGH_1,
543};
544
545__subsystem struct gpio_driver_api {
546 int (*pin_configure)(const struct device *port, gpio_pin_t pin,
548#ifdef CONFIG_GPIO_GET_CONFIG
549 int (*pin_get_config)(const struct device *port, gpio_pin_t pin,
551#endif
552 int (*port_get_raw)(const struct device *port,
553 gpio_port_value_t *value);
554 int (*port_set_masked_raw)(const struct device *port,
555 gpio_port_pins_t mask,
556 gpio_port_value_t value);
557 int (*port_set_bits_raw)(const struct device *port,
558 gpio_port_pins_t pins);
559 int (*port_clear_bits_raw)(const struct device *port,
560 gpio_port_pins_t pins);
561 int (*port_toggle_bits)(const struct device *port,
562 gpio_port_pins_t pins);
563 int (*pin_interrupt_configure)(const struct device *port,
564 gpio_pin_t pin,
565 enum gpio_int_mode, enum gpio_int_trig);
566 int (*manage_callback)(const struct device *port,
567 struct gpio_callback *cb,
568 bool set);
569 uint32_t (*get_pending_int)(const struct device *dev);
570#ifdef CONFIG_GPIO_GET_DIRECTION
571 int (*port_get_direction)(const struct device *port, gpio_port_pins_t map,
572 gpio_port_pins_t *inputs, gpio_port_pins_t *outputs);
573#endif /* CONFIG_GPIO_GET_DIRECTION */
574};
575
600__syscall int gpio_pin_interrupt_configure(const struct device *port,
601 gpio_pin_t pin,
603
604static inline int z_impl_gpio_pin_interrupt_configure(const struct device *port,
605 gpio_pin_t pin,
607{
608 const struct gpio_driver_api *api =
609 (const struct gpio_driver_api *)port->api;
610 __unused const struct gpio_driver_config *const cfg =
611 (const struct gpio_driver_config *)port->config;
612 const struct gpio_driver_data *const data =
613 (const struct gpio_driver_data *)port->data;
614 enum gpio_int_trig trig;
615 enum gpio_int_mode mode;
616
617 __ASSERT((flags & (GPIO_INT_DISABLE | GPIO_INT_ENABLE))
618 != (GPIO_INT_DISABLE | GPIO_INT_ENABLE),
619 "Cannot both enable and disable interrupts");
620
621 __ASSERT((flags & (GPIO_INT_DISABLE | GPIO_INT_ENABLE)) != 0U,
622 "Must either enable or disable interrupts");
623
624 __ASSERT(((flags & GPIO_INT_ENABLE) == 0) ||
625 ((flags & GPIO_INT_EDGE) != 0) ||
626 ((flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)) !=
627 (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)),
628 "Only one of GPIO_INT_LOW_0, GPIO_INT_HIGH_1 can be "
629 "enabled for a level interrupt.");
630
631 __ASSERT(((flags & GPIO_INT_ENABLE) == 0) ||
632 ((flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1)) != 0),
633 "At least one of GPIO_INT_LOW_0, GPIO_INT_HIGH_1 has to be "
634 "enabled.");
635
636 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
637 "Unsupported pin");
638
639 if (((flags & GPIO_INT_LEVELS_LOGICAL) != 0) &&
640 ((data->invert & (gpio_port_pins_t)BIT(pin)) != 0)) {
641 /* Invert signal bits */
642 flags ^= (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1);
643 }
644
645 trig = (enum gpio_int_trig)(flags & (GPIO_INT_LOW_0 | GPIO_INT_HIGH_1));
646 mode = (enum gpio_int_mode)(flags & (GPIO_INT_EDGE | GPIO_INT_DISABLE | GPIO_INT_ENABLE));
647
648 return api->pin_interrupt_configure(port, pin, mode, trig);
649}
650
664static inline int gpio_pin_interrupt_configure_dt(const struct gpio_dt_spec *spec,
666{
667 return gpio_pin_interrupt_configure(spec->port, spec->pin, flags);
668}
669
685__syscall int gpio_pin_configure(const struct device *port,
686 gpio_pin_t pin,
688
689static inline int z_impl_gpio_pin_configure(const struct device *port,
690 gpio_pin_t pin,
692{
693 const struct gpio_driver_api *api =
694 (const struct gpio_driver_api *)port->api;
695 __unused const struct gpio_driver_config *const cfg =
696 (const struct gpio_driver_config *)port->config;
697 struct gpio_driver_data *data =
698 (struct gpio_driver_data *)port->data;
699
700 __ASSERT((flags & GPIO_INT_MASK) == 0,
701 "Interrupt flags are not supported");
702
703 __ASSERT((flags & (GPIO_PULL_UP | GPIO_PULL_DOWN)) !=
705 "Pull Up and Pull Down should not be enabled simultaneously");
706
707 __ASSERT((flags & GPIO_OUTPUT) != 0 || (flags & GPIO_SINGLE_ENDED) == 0,
708 "Output needs to be enabled for 'Open Drain', 'Open Source' "
709 "mode to be supported");
710
711 __ASSERT_NO_MSG((flags & GPIO_SINGLE_ENDED) != 0 ||
712 (flags & GPIO_LINE_OPEN_DRAIN) == 0);
713
714 __ASSERT((flags & (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH)) == 0
715 || (flags & GPIO_OUTPUT) != 0,
716 "Output needs to be enabled to be initialized low or high");
717
718 __ASSERT((flags & (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH))
719 != (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH),
720 "Output cannot be initialized low and high");
721
722 if (((flags & GPIO_OUTPUT_INIT_LOGICAL) != 0)
723 && ((flags & (GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH)) != 0)
724 && ((flags & GPIO_ACTIVE_LOW) != 0)) {
725 flags ^= GPIO_OUTPUT_INIT_LOW | GPIO_OUTPUT_INIT_HIGH;
726 }
727
728 flags &= ~GPIO_OUTPUT_INIT_LOGICAL;
729
730 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
731 "Unsupported pin");
732
733 if ((flags & GPIO_ACTIVE_LOW) != 0) {
734 data->invert |= (gpio_port_pins_t)BIT(pin);
735 } else {
736 data->invert &= ~(gpio_port_pins_t)BIT(pin);
737 }
738
739 return api->pin_configure(port, pin, flags);
740}
741
753static inline int gpio_pin_configure_dt(const struct gpio_dt_spec *spec,
754 gpio_flags_t extra_flags)
755{
756 return gpio_pin_configure(spec->port,
757 spec->pin,
758 spec->dt_flags | extra_flags);
759}
760
761/*
762 * @brief Get direction of select pins in a port.
763 *
764 * Retrieve direction of each pin specified in @p map.
765 *
766 * If @p inputs or @p outputs is NULL, then this function does not get the
767 * respective input or output direction information.
768 *
769 * @param port Pointer to the device structure for the driver instance.
770 * @param map Bitmap of pin directions to query.
771 * @param inputs Pointer to a variable where input directions will be stored.
772 * @param outputs Pointer to a variable where output directions will be stored.
773 *
774 * @retval 0 If successful.
775 * @retval -ENOSYS if the underlying driver does not support this call.
776 * @retval -EIO I/O error when accessing an external GPIO chip.
777 * @retval -EWOULDBLOCK if operation would block.
778 */
779__syscall int gpio_port_get_direction(const struct device *port, gpio_port_pins_t map,
780 gpio_port_pins_t *inputs, gpio_port_pins_t *outputs);
781
782#ifdef CONFIG_GPIO_GET_DIRECTION
783static inline int z_impl_gpio_port_get_direction(const struct device *port, gpio_port_pins_t map,
784 gpio_port_pins_t *inputs,
785 gpio_port_pins_t *outputs)
786{
787 const struct gpio_driver_api *api = (const struct gpio_driver_api *)port->api;
788
789 if (api->port_get_direction == NULL) {
790 return -ENOSYS;
791 }
792
793 return api->port_get_direction(port, map, inputs, outputs);
794}
795#endif /* CONFIG_GPIO_GET_DIRECTION */
796
809static inline int gpio_pin_is_input(const struct device *port, gpio_pin_t pin)
810{
811 int rv;
812 gpio_port_pins_t pins;
813 __unused const struct gpio_driver_config *cfg =
814 (const struct gpio_driver_config *)port->config;
815
816 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U, "Unsupported pin");
817
818 rv = gpio_port_get_direction(port, BIT(pin), &pins, NULL);
819 if (rv < 0) {
820 return rv;
821 }
822
823 return (int)!!((gpio_port_pins_t)BIT(pin) & pins);
824}
825
838static inline int gpio_pin_is_output(const struct device *port, gpio_pin_t pin)
839{
840 int rv;
841 gpio_port_pins_t pins;
842 __unused const struct gpio_driver_config *cfg =
843 (const struct gpio_driver_config *)port->config;
844
845 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U, "Unsupported pin");
846
847 rv = gpio_port_get_direction(port, BIT(pin), NULL, &pins);
848 if (rv < 0) {
849 return rv;
850 }
851
852 return (int)!!((gpio_port_pins_t)BIT(pin) & pins);
853}
854
870__syscall int gpio_pin_get_config(const struct device *port, gpio_pin_t pin,
872
873#ifdef CONFIG_GPIO_GET_CONFIG
874static inline int z_impl_gpio_pin_get_config(const struct device *port,
875 gpio_pin_t pin,
877{
878 const struct gpio_driver_api *api =
879 (const struct gpio_driver_api *)port->api;
880
881 if (api->pin_get_config == NULL)
882 return -ENOSYS;
883
884 return api->pin_get_config(port, pin, flags);
885}
886#endif
887
900static inline int gpio_pin_get_config_dt(const struct gpio_dt_spec *spec,
902{
903 return gpio_pin_get_config(spec->port, spec->pin, flags);
904}
905
923__syscall int gpio_port_get_raw(const struct device *port,
924 gpio_port_value_t *value);
925
926static inline int z_impl_gpio_port_get_raw(const struct device *port,
927 gpio_port_value_t *value)
928{
929 const struct gpio_driver_api *api =
930 (const struct gpio_driver_api *)port->api;
931
932 return api->port_get_raw(port, value);
933}
934
953static inline int gpio_port_get(const struct device *port,
954 gpio_port_value_t *value)
955{
956 const struct gpio_driver_data *const data =
957 (const struct gpio_driver_data *)port->data;
958 int ret;
959
960 ret = gpio_port_get_raw(port, value);
961 if (ret == 0) {
962 *value ^= data->invert;
963 }
964
965 return ret;
966}
967
985__syscall int gpio_port_set_masked_raw(const struct device *port,
986 gpio_port_pins_t mask,
987 gpio_port_value_t value);
988
989static inline int z_impl_gpio_port_set_masked_raw(const struct device *port,
990 gpio_port_pins_t mask,
991 gpio_port_value_t value)
992{
993 const struct gpio_driver_api *api =
994 (const struct gpio_driver_api *)port->api;
995
996 return api->port_set_masked_raw(port, mask, value);
997}
998
1019static inline int gpio_port_set_masked(const struct device *port,
1020 gpio_port_pins_t mask,
1021 gpio_port_value_t value)
1022{
1023 const struct gpio_driver_data *const data =
1024 (const struct gpio_driver_data *)port->data;
1025
1026 value ^= data->invert;
1027
1028 return gpio_port_set_masked_raw(port, mask, value);
1029}
1030
1041__syscall int gpio_port_set_bits_raw(const struct device *port,
1042 gpio_port_pins_t pins);
1043
1044static inline int z_impl_gpio_port_set_bits_raw(const struct device *port,
1045 gpio_port_pins_t pins)
1046{
1047 const struct gpio_driver_api *api =
1048 (const struct gpio_driver_api *)port->api;
1049
1050 return api->port_set_bits_raw(port, pins);
1051}
1052
1063static inline int gpio_port_set_bits(const struct device *port,
1064 gpio_port_pins_t pins)
1065{
1066 return gpio_port_set_masked(port, pins, pins);
1067}
1068
1079__syscall int gpio_port_clear_bits_raw(const struct device *port,
1080 gpio_port_pins_t pins);
1081
1082static inline int z_impl_gpio_port_clear_bits_raw(const struct device *port,
1083 gpio_port_pins_t pins)
1084{
1085 const struct gpio_driver_api *api =
1086 (const struct gpio_driver_api *)port->api;
1087
1088 return api->port_clear_bits_raw(port, pins);
1089}
1090
1101static inline int gpio_port_clear_bits(const struct device *port,
1102 gpio_port_pins_t pins)
1103{
1104 return gpio_port_set_masked(port, pins, 0);
1105}
1106
1117__syscall int gpio_port_toggle_bits(const struct device *port,
1118 gpio_port_pins_t pins);
1119
1120static inline int z_impl_gpio_port_toggle_bits(const struct device *port,
1121 gpio_port_pins_t pins)
1122{
1123 const struct gpio_driver_api *api =
1124 (const struct gpio_driver_api *)port->api;
1125
1126 return api->port_toggle_bits(port, pins);
1127}
1128
1140static inline int gpio_port_set_clr_bits_raw(const struct device *port,
1141 gpio_port_pins_t set_pins,
1142 gpio_port_pins_t clear_pins)
1143{
1144 __ASSERT((set_pins & clear_pins) == 0, "Set and Clear pins overlap");
1145
1146 return gpio_port_set_masked_raw(port, set_pins | clear_pins, set_pins);
1147}
1148
1160static inline int gpio_port_set_clr_bits(const struct device *port,
1161 gpio_port_pins_t set_pins,
1162 gpio_port_pins_t clear_pins)
1163{
1164 __ASSERT((set_pins & clear_pins) == 0, "Set and Clear pins overlap");
1165
1166 return gpio_port_set_masked(port, set_pins | clear_pins, set_pins);
1167}
1168
1184static inline int gpio_pin_get_raw(const struct device *port, gpio_pin_t pin)
1185{
1186 __unused const struct gpio_driver_config *const cfg =
1187 (const struct gpio_driver_config *)port->config;
1188 gpio_port_value_t value;
1189 int ret;
1190
1191 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1192 "Unsupported pin");
1193
1194 ret = gpio_port_get_raw(port, &value);
1195 if (ret == 0) {
1196 ret = (value & (gpio_port_pins_t)BIT(pin)) != 0 ? 1 : 0;
1197 }
1198
1199 return ret;
1200}
1201
1221static inline int gpio_pin_get(const struct device *port, gpio_pin_t pin)
1222{
1223 __unused const struct gpio_driver_config *const cfg =
1224 (const struct gpio_driver_config *)port->config;
1225 gpio_port_value_t value;
1226 int ret;
1227
1228 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1229 "Unsupported pin");
1230
1231 ret = gpio_port_get(port, &value);
1232 if (ret == 0) {
1233 ret = (value & (gpio_port_pins_t)BIT(pin)) != 0 ? 1 : 0;
1234 }
1235
1236 return ret;
1237}
1238
1249static inline int gpio_pin_get_dt(const struct gpio_dt_spec *spec)
1250{
1251 return gpio_pin_get(spec->port, spec->pin);
1252}
1253
1269static inline int gpio_pin_set_raw(const struct device *port, gpio_pin_t pin,
1270 int value)
1271{
1272 __unused const struct gpio_driver_config *const cfg =
1273 (const struct gpio_driver_config *)port->config;
1274 int ret;
1275
1276 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1277 "Unsupported pin");
1278
1279 if (value != 0) {
1281 } else {
1283 }
1284
1285 return ret;
1286}
1287
1309static inline int gpio_pin_set(const struct device *port, gpio_pin_t pin,
1310 int value)
1311{
1312 __unused const struct gpio_driver_config *const cfg =
1313 (const struct gpio_driver_config *)port->config;
1314 const struct gpio_driver_data *const data =
1315 (const struct gpio_driver_data *)port->data;
1316
1317 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1318 "Unsupported pin");
1319
1320 if (data->invert & (gpio_port_pins_t)BIT(pin)) {
1321 value = (value != 0) ? 0 : 1;
1322 }
1323
1324 return gpio_pin_set_raw(port, pin, value);
1325}
1326
1338static inline int gpio_pin_set_dt(const struct gpio_dt_spec *spec, int value)
1339{
1340 return gpio_pin_set(spec->port, spec->pin, value);
1341}
1342
1353static inline int gpio_pin_toggle(const struct device *port, gpio_pin_t pin)
1354{
1355 __unused const struct gpio_driver_config *const cfg =
1356 (const struct gpio_driver_config *)port->config;
1357
1358 __ASSERT((cfg->port_pin_mask & (gpio_port_pins_t)BIT(pin)) != 0U,
1359 "Unsupported pin");
1360
1361 return gpio_port_toggle_bits(port, (gpio_port_pins_t)BIT(pin));
1362}
1363
1374static inline int gpio_pin_toggle_dt(const struct gpio_dt_spec *spec)
1375{
1376 return gpio_pin_toggle(spec->port, spec->pin);
1377}
1378
1385static inline void gpio_init_callback(struct gpio_callback *callback,
1387 gpio_port_pins_t pin_mask)
1388{
1389 __ASSERT(callback, "Callback pointer should not be NULL");
1390 __ASSERT(handler, "Callback handler pointer should not be NULL");
1391
1392 callback->handler = handler;
1393 callback->pin_mask = pin_mask;
1394}
1395
1408static inline int gpio_add_callback(const struct device *port,
1409 struct gpio_callback *callback)
1410{
1411 const struct gpio_driver_api *api =
1412 (const struct gpio_driver_api *)port->api;
1413
1414 if (api->manage_callback == NULL) {
1415 return -ENOTSUP;
1416 }
1417
1418 return api->manage_callback(port, callback, true);
1419}
1420
1437static inline int gpio_remove_callback(const struct device *port,
1438 struct gpio_callback *callback)
1439{
1440 const struct gpio_driver_api *api =
1441 (const struct gpio_driver_api *)port->api;
1442
1443 if (api->manage_callback == NULL) {
1444 return -ENOTSUP;
1445 }
1446
1447 return api->manage_callback(port, callback, false);
1448}
1449
1463__syscall int gpio_get_pending_int(const struct device *dev);
1464
1465static inline int z_impl_gpio_get_pending_int(const struct device *dev)
1466{
1467 const struct gpio_driver_api *api =
1468 (const struct gpio_driver_api *)dev->api;
1469
1470 if (api->get_pending_int == NULL) {
1471 return -ENOTSUP;
1472 }
1473
1474 return api->get_pending_int(dev);
1475}
1476
1481#ifdef __cplusplus
1482}
1483#endif
1484
1485#include <syscalls/gpio.h>
1486
1487#endif /* ZEPHYR_INCLUDE_DRIVERS_GPIO_H_ */
volatile int rv
Definition: main.c:45
static int gpio_add_callback(const struct device *port, struct gpio_callback *callback)
Add an application callback.
Definition: gpio.h:1408
#define GPIO_OUTPUT
Definition: gpio.h:70
static int gpio_pin_get_raw(const struct device *port, gpio_pin_t pin)
Get physical level of an input pin.
Definition: gpio.h:1184
int gpio_pin_get_config(const struct device *port, gpio_pin_t pin, gpio_flags_t *flags)
Get a configuration of a single pin.
static int gpio_pin_is_input(const struct device *port, gpio_pin_t pin)
Check if pin is configured for input.
Definition: gpio.h:809
static int gpio_pin_get(const struct device *port, gpio_pin_t pin)
Get logical level of an input pin.
Definition: gpio.h:1221
int gpio_port_set_bits_raw(const struct device *port, gpio_port_pins_t pins)
Set physical level of selected output pins to high.
static int gpio_pin_interrupt_configure_dt(const struct gpio_dt_spec *spec, gpio_flags_t flags)
Configure pin interrupts from a gpio_dt_spec.
Definition: gpio.h:664
void(* gpio_callback_handler_t)(const struct device *port, struct gpio_callback *cb, gpio_port_pins_t pins)
Define the application callback handler function signature.
Definition: gpio.h:486
static int gpio_pin_toggle_dt(const struct gpio_dt_spec *spec)
Toggle pin level from a gpio_dt_spec.
Definition: gpio.h:1374
uint8_t gpio_pin_t
Provides a type to hold a GPIO pin index.
Definition: gpio.h:259
static int gpio_pin_is_output(const struct device *port, gpio_pin_t pin)
Check if pin is configured for output.
Definition: gpio.h:838
int gpio_get_pending_int(const struct device *dev)
Function to get pending interrupts.
static int gpio_pin_configure_dt(const struct gpio_dt_spec *spec, gpio_flags_t extra_flags)
Configure a single pin from a gpio_dt_spec and some extra flags.
Definition: gpio.h:753
static int gpio_pin_set_dt(const struct gpio_dt_spec *spec, int value)
Set logical level of a output pin from a gpio_dt_spec.
Definition: gpio.h:1338
static int gpio_port_set_bits(const struct device *port, gpio_port_pins_t pins)
Set logical level of selected output pins to active.
Definition: gpio.h:1063
uint32_t gpio_flags_t
Provides a type to hold GPIO configuration flags.
Definition: gpio.h:279
#define GPIO_ACTIVE_LOW
Definition: gpio.h:23
static int gpio_port_set_clr_bits_raw(const struct device *port, gpio_port_pins_t set_pins, gpio_port_pins_t clear_pins)
Set physical level of selected output pins.
Definition: gpio.h:1140
static int gpio_port_set_clr_bits(const struct device *port, gpio_port_pins_t set_pins, gpio_port_pins_t clear_pins)
Set logical level of selected output pins.
Definition: gpio.h:1160
static void gpio_init_callback(struct gpio_callback *callback, gpio_callback_handler_t handler, gpio_port_pins_t pin_mask)
Helper to initialize a struct gpio_callback properly.
Definition: gpio.h:1385
uint32_t gpio_port_pins_t
Identifies a set of pins associated with a port.
Definition: gpio.h:238
static int gpio_pin_get_config_dt(const struct gpio_dt_spec *spec, gpio_flags_t *flags)
Get a configuration of a single pin from a gpio_dt_spec.
Definition: gpio.h:900
int gpio_port_toggle_bits(const struct device *port, gpio_port_pins_t pins)
Toggle level of selected output pins.
#define GPIO_INT_DISABLE
Definition: gpio.h:115
int gpio_pin_interrupt_configure(const struct device *port, gpio_pin_t pin, gpio_flags_t flags)
Configure pin interrupt.
int gpio_port_clear_bits_raw(const struct device *port, gpio_port_pins_t pins)
Set physical level of selected output pins to low.
int gpio_port_set_masked_raw(const struct device *port, gpio_port_pins_t mask, gpio_port_value_t value)
Set physical level of output pins in a port.
#define GPIO_PULL_UP
Definition: gpio.h:72
static int gpio_pin_get_dt(const struct gpio_dt_spec *spec)
Get logical level of an input pin from a gpio_dt_spec.
Definition: gpio.h:1249
static int gpio_pin_toggle(const struct device *port, gpio_pin_t pin)
Toggle pin level.
Definition: gpio.h:1353
uint32_t gpio_port_value_t
Provides values for a set of pins associated with a port.
Definition: gpio.h:251
static int gpio_pin_set(const struct device *port, gpio_pin_t pin, int value)
Set logical level of an output pin.
Definition: gpio.h:1309
static int gpio_port_clear_bits(const struct device *port, gpio_port_pins_t pins)
Set logical level of selected output pins to inactive.
Definition: gpio.h:1101
static int gpio_remove_callback(const struct device *port, struct gpio_callback *callback)
Remove an application callback.
Definition: gpio.h:1437
static int gpio_port_set_masked(const struct device *port, gpio_port_pins_t mask, gpio_port_value_t value)
Set logical level of output pins in a port.
Definition: gpio.h:1019
int gpio_port_get_direction(const struct device *port, gpio_port_pins_t map, gpio_port_pins_t *inputs, gpio_port_pins_t *outputs)
uint16_t gpio_dt_flags_t
Provides a type to hold GPIO devicetree flags.
Definition: gpio.h:271
#define GPIO_PULL_DOWN
Definition: gpio.h:75
static int gpio_pin_set_raw(const struct device *port, gpio_pin_t pin, int value)
Set physical level of an output pin.
Definition: gpio.h:1269
int gpio_port_get_raw(const struct device *port, gpio_port_value_t *value)
Get physical level of all input pins in a port.
static int gpio_port_get(const struct device *port, gpio_port_value_t *value)
Get logical level of all input pins in a port.
Definition: gpio.h:953
int gpio_pin_configure(const struct device *port, gpio_pin_t pin, gpio_flags_t flags)
Configure a single pin.
#define BIT(n)
Unsigned integer with bit position n set (signed in assembly language).
Definition: util_macro.h:44
#define ENOSYS
Definition: errno.h:83
#define ENOTSUP
Definition: errno.h:115
flags
Definition: http_parser.h:131
static ZTEST_BMEM volatile int ret
Definition: k_float_disable.c:28
struct region_map map[]
Definition: main.c:35
Single-linked list implementation.
struct _snode sys_snode_t
Definition: slist.h:33
__UINT32_TYPE__ uint32_t
Definition: stdint.h:90
__UINT8_TYPE__ uint8_t
Definition: stdint.h:88
__UINT16_TYPE__ uint16_t
Definition: stdint.h:89
Runtime device structure (in ROM) per driver instance.
Definition: device.h:435
void * data
Definition: device.h:445
const void * api
Definition: device.h:441
const void * config
Definition: device.h:439
GPIO callback structure.
Definition: gpio.h:500
sys_snode_t node
Definition: gpio.h:504
gpio_port_pins_t pin_mask
Definition: gpio.h:515
gpio_callback_handler_t handler
Definition: gpio.h:507
Definition: gpio.h:450
gpio_port_pins_t port_pin_mask
Definition: gpio.h:456
Definition: gpio.h:463
gpio_port_pins_t invert
Definition: gpio.h:469
Container for GPIO pin information specified in devicetree.
Definition: gpio.h:293
const struct device * port
Definition: gpio.h:295
gpio_pin_t pin
Definition: gpio.h:297
gpio_dt_flags_t dt_flags
Definition: gpio.h:299
static fdata_t data[2]
Definition: test_fifo_contexts.c:15
static void handler(struct k_timer *timer)
Definition: main.c:19