Zephyr Project API
3.2.0
A Scalable Open Source RTOS
peci.h
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2020 Intel Corporation.
3
*
4
* SPDX-License-Identifier: Apache-2.0
5
*/
6
12
#ifndef ZEPHYR_INCLUDE_DRIVERS_PECI_H_
13
#define ZEPHYR_INCLUDE_DRIVERS_PECI_H_
14
22
#include <
errno.h
>
23
#include <
zephyr/types.h
>
24
#include <stddef.h>
25
#include <
zephyr/device.h
>
26
#include <
zephyr/dt-bindings/pwm/pwm.h
>
27
28
#ifdef __cplusplus
29
extern
"C"
{
30
#endif
31
35
enum
peci_error_code
{
36
PECI_GENERAL_SENSOR_ERROR
= 0x8000,
37
PECI_UNDERFLOW_SENSOR_ERROR
= 0x8002,
38
PECI_OVERFLOW_SENSOR_ERROR
= 0x8003,
39
};
40
44
enum
peci_command_code
{
45
PECI_CMD_PING
= 0x00,
46
PECI_CMD_GET_TEMP0
= 0x01,
47
PECI_CMD_GET_TEMP1
= 0x02,
48
PECI_CMD_RD_PCI_CFG0
= 0x61,
49
PECI_CMD_RD_PCI_CFG1
= 0x62,
50
PECI_CMD_WR_PCI_CFG0
= 0x65,
51
PECI_CMD_WR_PCI_CFG1
= 0x66,
52
PECI_CMD_RD_PKG_CFG0
= 0xA1,
53
PECI_CMD_RD_PKG_CFG1
= 0xA,
54
PECI_CMD_WR_PKG_CFG0
= 0xA5,
55
PECI_CMD_WR_PKG_CFG1
= 0xA6,
56
PECI_CMD_RD_IAMSR0
= 0xB1,
57
PECI_CMD_RD_IAMSR1
= 0xB2,
58
PECI_CMD_WR_IAMSR0
= 0xB5,
59
PECI_CMD_WR_IAMSR1
= 0xB6,
60
PECI_CMD_RD_PCI_CFG_LOCAL0
= 0xE1,
61
PECI_CMD_RD_PCI_CFG_LOCAL1
= 0xE2,
62
PECI_CMD_WR_PCI_CFG_LOCAL0
= 0xE5,
63
PECI_CMD_WR_PCI_CFG_LOCAL1
= 0xE6,
64
PECI_CMD_GET_DIB
= 0xF7,
65
};
66
68
#define PECI_CC_RSP_SUCCESS (0x40U)
69
#define PECI_CC_RSP_TIMEOUT (0x80U)
70
#define PECI_CC_OUT_OF_RESOURCES_TIMEOUT (0x81U)
71
#define PECI_CC_RESOURCES_LOWPWR_TIMEOUT (0x82U)
72
#define PECI_CC_ILLEGAL_REQUEST (0x90U)
73
75
#define PECI_PING_WR_LEN (0U)
76
#define PECI_PING_RD_LEN (0U)
77
#define PECI_PING_LEN (3U)
78
80
#define PECI_GET_DIB_WR_LEN (1U)
81
#define PECI_GET_DIB_RD_LEN (8U)
82
#define PECI_GET_DIB_CMD_LEN (4U)
83
#define PECI_GET_DIB_DEVINFO (0U)
84
#define PECI_GET_DIB_REVNUM (1U)
85
#define PECI_GET_DIB_DOMAIN_BIT_MASK (0x4U)
86
#define PECI_GET_DIB_MAJOR_REV_MASK 0xF0
87
#define PECI_GET_DIB_MINOR_REV_MASK 0x0F
88
90
#define PECI_GET_TEMP_WR_LEN (1U)
91
#define PECI_GET_TEMP_RD_LEN (2U)
92
#define PECI_GET_TEMP_CMD_LEN (4U)
93
#define PECI_GET_TEMP_LSB (0U)
94
#define PECI_GET_TEMP_MSB (1U)
95
#define PECI_GET_TEMP_ERR_MSB (0x80U)
96
#define PECI_GET_TEMP_ERR_LSB_GENERAL (0x0U)
97
#define PECI_GET_TEMP_ERR_LSB_RES (0x1U)
98
#define PECI_GET_TEMP_ERR_LSB_TEMP_LO (0x2U)
99
#define PECI_GET_TEMP_ERR_LSB_TEMP_HI (0x3U)
100
102
#define PECI_RD_PKG_WR_LEN (5U)
103
#define PECI_RD_PKG_LEN_BYTE (2U)
104
#define PECI_RD_PKG_LEN_WORD (3U)
105
#define PECI_RD_PKG_LEN_DWORD (5U)
106
#define PECI_RD_PKG_CMD_LEN (8U)
107
109
#define PECI_WR_PKG_RD_LEN (1U)
110
#define PECI_WR_PKG_LEN_BYTE (7U)
111
#define PECI_WR_PKG_LEN_WORD (8U)
112
#define PECI_WR_PKG_LEN_DWORD (10U)
113
#define PECI_WR_PKG_CMD_LEN (9U)
114
116
#define PECI_RD_IAMSR_WR_LEN (5U)
117
#define PECI_RD_IAMSR_LEN_BYTE (2U)
118
#define PECI_RD_IAMSR_LEN_WORD (3U)
119
#define PECI_RD_IAMSR_LEN_DWORD (5U)
120
#define PECI_RD_IAMSR_LEN_QWORD (9U)
121
#define PECI_RD_IAMSR_CMD_LEN (8U)
122
124
#define PECI_WR_IAMSR_RD_LEN (1U)
125
#define PECI_WR_IAMSR_LEN_BYTE (7U)
126
#define PECI_WR_IAMSR_LEN_WORD (8U)
127
#define PECI_WR_IAMSR_LEN_DWORD (10U)
128
#define PECI_WR_IAMSR_LEN_QWORD (14U)
129
#define PECI_WR_IAMSR_CMD_LEN (9U)
130
132
#define PECI_RD_PCICFG_WR_LEN (6U)
133
#define PECI_RD_PCICFG_LEN_BYTE (2U)
134
#define PECI_RD_PCICFG_LEN_WORD (3U)
135
#define PECI_RD_PCICFG_LEN_DWORD (5U)
136
#define PECI_RD_PCICFG_CMD_LEN (9U)
137
139
#define PECI_WR_PCICFG_RD_LEN (1U)
140
#define PECI_WR_PCICFG_LEN_BYTE (8U)
141
#define PECI_WR_PCICFG_LEN_WORD (9U)
142
#define PECI_WR_PCICFG_LEN_DWORD (11U)
143
#define PECI_WR_PCICFG_CMD_LEN (10U)
144
146
#define PECI_RD_PCICFGL_WR_LEN (5U)
147
#define PECI_RD_PCICFGL_RD_LEN_BYTE (2U)
148
#define PECI_RD_PCICFGL_RD_LEN_WORD (3U)
149
#define PECI_RD_PCICFGL_RD_LEN_DWORD (5U)
150
#define PECI_RD_PCICFGL_CMD_LEN (8U)
151
153
#define PECI_WR_PCICFGL_RD_LEN (1U)
154
#define PECI_WR_PCICFGL_WR_LEN_BYTE (7U)
155
#define PECI_WR_PCICFGL_WR_LEN_WORD (8U)
156
#define PECI_WR_PCICFGL_WR_LEN_DWORD (10U)
157
#define PECI_WR_PCICFGL_CMD_LEN (9U)
158
169
struct
peci_buf
{
170
uint8_t
*
buf
;
171
size_t
len
;
172
};
173
177
struct
peci_msg
{
179
uint8_t
addr
;
181
enum
peci_command_code
cmd_code
;
183
struct
peci_buf
tx_buffer
;
185
struct
peci_buf
rx_buffer
;
187
uint8_t
flags
;
188
};
189
197
typedef
int (*peci_config_t)(
const
struct
device
*dev,
uint32_t
bitrate);
198
typedef
int (*peci_transfer_t)(
const
struct
device
*dev,
struct
peci_msg
*
msg
);
199
typedef
int (*peci_disable_t)(
const
struct
device
*dev);
200
typedef
int (*peci_enable_t)(
const
struct
device
*dev);
201
202
struct
peci_driver_api {
203
peci_config_t config;
204
peci_disable_t disable;
205
peci_enable_t enable;
206
peci_transfer_t transfer;
207
};
208
223
__syscall
int
peci_config
(
const
struct
device
*dev,
uint32_t
bitrate);
224
225
static
inline
int
z_impl_peci_config(
const
struct
device
*dev,
226
uint32_t
bitrate)
227
{
228
struct
peci_driver_api *api;
229
230
api = (
struct
peci_driver_api *)dev->
api
;
231
return
api->config(dev, bitrate);
232
}
233
242
__syscall
int
peci_enable
(
const
struct
device
*dev);
243
244
static
inline
int
z_impl_peci_enable(
const
struct
device
*dev)
245
{
246
struct
peci_driver_api *api;
247
248
api = (
struct
peci_driver_api *)dev->
api
;
249
return
api->enable(dev);
250
}
251
260
__syscall
int
peci_disable
(
const
struct
device
*dev);
261
262
static
inline
int
z_impl_peci_disable(
const
struct
device
*dev)
263
{
264
struct
peci_driver_api *api;
265
266
api = (
struct
peci_driver_api *)dev->
api
;
267
return
api->disable(dev);
268
}
269
280
__syscall
int
peci_transfer
(
const
struct
device
*dev,
struct
peci_msg
*
msg
);
281
282
static
inline
int
z_impl_peci_transfer(
const
struct
device
*dev,
283
struct
peci_msg
*
msg
)
284
{
285
struct
peci_driver_api *api;
286
287
api = (
struct
peci_driver_api *)dev->
api
;
288
return
api->transfer(dev,
msg
);
289
}
290
291
292
#ifdef __cplusplus
293
}
294
#endif
295
300
#include <syscalls/peci.h>
301
302
#endif
/* ZEPHYR_INCLUDE_DRIVERS_PECI_H_ */
device.h
pwm.h
errno.h
System error numbers.
peci_error_code
peci_error_code
PECI error codes.
Definition:
peci.h:35
peci_config
int peci_config(const struct device *dev, uint32_t bitrate)
Configures the PECI interface.
peci_enable
int peci_enable(const struct device *dev)
Enable PECI interface.
peci_command_code
peci_command_code
PECI commands.
Definition:
peci.h:44
peci_transfer
int peci_transfer(const struct device *dev, struct peci_msg *msg)
Performs a PECI transaction.
peci_disable
int peci_disable(const struct device *dev)
Disable PECI interface.
PECI_UNDERFLOW_SENSOR_ERROR
@ PECI_UNDERFLOW_SENSOR_ERROR
Definition:
peci.h:37
PECI_GENERAL_SENSOR_ERROR
@ PECI_GENERAL_SENSOR_ERROR
Definition:
peci.h:36
PECI_OVERFLOW_SENSOR_ERROR
@ PECI_OVERFLOW_SENSOR_ERROR
Definition:
peci.h:38
PECI_CMD_GET_DIB
@ PECI_CMD_GET_DIB
Definition:
peci.h:64
PECI_CMD_GET_TEMP1
@ PECI_CMD_GET_TEMP1
Definition:
peci.h:47
PECI_CMD_RD_PCI_CFG_LOCAL0
@ PECI_CMD_RD_PCI_CFG_LOCAL0
Definition:
peci.h:60
PECI_CMD_RD_PKG_CFG1
@ PECI_CMD_RD_PKG_CFG1
Definition:
peci.h:53
PECI_CMD_WR_IAMSR0
@ PECI_CMD_WR_IAMSR0
Definition:
peci.h:58
PECI_CMD_WR_PKG_CFG1
@ PECI_CMD_WR_PKG_CFG1
Definition:
peci.h:55
PECI_CMD_RD_PKG_CFG0
@ PECI_CMD_RD_PKG_CFG0
Definition:
peci.h:52
PECI_CMD_WR_PCI_CFG1
@ PECI_CMD_WR_PCI_CFG1
Definition:
peci.h:51
PECI_CMD_RD_IAMSR1
@ PECI_CMD_RD_IAMSR1
Definition:
peci.h:57
PECI_CMD_RD_PCI_CFG1
@ PECI_CMD_RD_PCI_CFG1
Definition:
peci.h:49
PECI_CMD_WR_PCI_CFG_LOCAL1
@ PECI_CMD_WR_PCI_CFG_LOCAL1
Definition:
peci.h:63
PECI_CMD_RD_PCI_CFG0
@ PECI_CMD_RD_PCI_CFG0
Definition:
peci.h:48
PECI_CMD_WR_IAMSR1
@ PECI_CMD_WR_IAMSR1
Definition:
peci.h:59
PECI_CMD_WR_PKG_CFG0
@ PECI_CMD_WR_PKG_CFG0
Definition:
peci.h:54
PECI_CMD_WR_PCI_CFG0
@ PECI_CMD_WR_PCI_CFG0
Definition:
peci.h:50
PECI_CMD_RD_PCI_CFG_LOCAL1
@ PECI_CMD_RD_PCI_CFG_LOCAL1
Definition:
peci.h:61
PECI_CMD_RD_IAMSR0
@ PECI_CMD_RD_IAMSR0
Definition:
peci.h:56
PECI_CMD_PING
@ PECI_CMD_PING
Definition:
peci.h:45
PECI_CMD_WR_PCI_CFG_LOCAL0
@ PECI_CMD_WR_PCI_CFG_LOCAL0
Definition:
peci.h:62
PECI_CMD_GET_TEMP0
@ PECI_CMD_GET_TEMP0
Definition:
peci.h:46
types.h
uint32_t
__UINT32_TYPE__ uint32_t
Definition:
stdint.h:90
uint8_t
__UINT8_TYPE__ uint8_t
Definition:
stdint.h:88
device
Runtime device structure (in ROM) per driver instance.
Definition:
device.h:435
device::api
const void * api
Definition:
device.h:441
peci_buf
PECI buffer structure.
Definition:
peci.h:169
peci_buf::len
size_t len
Definition:
peci.h:171
peci_buf::buf
uint8_t * buf
Definition:
peci.h:170
peci_msg
PECI transaction packet format.
Definition:
peci.h:177
peci_msg::flags
uint8_t flags
Definition:
peci.h:187
peci_msg::cmd_code
enum peci_command_code cmd_code
Definition:
peci.h:181
peci_msg::tx_buffer
struct peci_buf tx_buffer
Definition:
peci.h:183
peci_msg::addr
uint8_t addr
Definition:
peci.h:179
peci_msg::rx_buffer
struct peci_buf rx_buffer
Definition:
peci.h:185
msg
static void msg(uint64_t c64)
Definition:
main.c:17
include
zephyr
drivers
peci.h
Generated on Tue Feb 28 2023 15:43:18 for Zephyr Project API by
1.9.2