6#ifndef ZEPHYR_INCLUDE_ARCH_ARM64_CACHE_H_ 
    7#define ZEPHYR_INCLUDE_ARCH_ARM64_CACHE_H_ 
   13#include <zephyr/arch/cpu.h> 
   20#define K_CACHE_WB              BIT(0) 
   21#define K_CACHE_INVD            BIT(1) 
   22#define K_CACHE_WB_INVD         (K_CACHE_WB | K_CACHE_INVD) 
   24#if defined(CONFIG_DCACHE) 
   26extern int arm64_dcache_range(
void *addr, 
size_t size, 
int op);
 
   27extern int arm64_dcache_all(
int op);
 
   29extern size_t arch_dcache_line_size_get(
void);
 
   46int ALWAYS_INLINE arch_dcache_flush_range(
void *addr, 
size_t size)
 
   48        return arm64_dcache_range(addr, size, 
K_CACHE_WB);
 
   51int ALWAYS_INLINE arch_dcache_invd_range(
void *addr, 
size_t size)
 
   56int ALWAYS_INLINE arch_dcache_flush_and_invd_range(
void *addr, 
size_t size)
 
   73#if defined(CONFIG_ICACHE) 
   75size_t arch_icache_line_size_get(
void)
 
   95int ALWAYS_INLINE arch_icache_flush_range(
void *addr, 
size_t size)
 
  100int ALWAYS_INLINE arch_icache_invd_range(
void *addr, 
size_t size)
 
  105int ALWAYS_INLINE arch_icache_flush_and_invd_range(
void *addr, 
size_t size)
 
#define K_CACHE_INVD
Definition: cache.h:21
 
#define K_CACHE_WB
Definition: cache.h:20
 
#define K_CACHE_WB_INVD
Definition: cache.h:22
 
#define ALWAYS_INLINE
Definition: common.h:124
 
#define ENOTSUP
Definition: errno.h:115