14#ifndef ZEPHYR_INCLUDE_ARCH_RISCV_IRQ_H_ 
   15#define ZEPHYR_INCLUDE_ARCH_RISCV_IRQ_H_ 
   32#if defined(CONFIG_RISCV_HAS_PLIC) || defined(CONFIG_RISCV_HAS_CLIC) 
   33extern void z_riscv_irq_priority_set(
unsigned int irq,
 
   37#define z_riscv_irq_priority_set(i, p, f)  
   40#define ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \ 
   42        Z_ISR_DECLARE(irq_p, 0, isr_p, isr_param_p); \ 
   43        z_riscv_irq_priority_set(irq_p, priority_p, flags_p); \ 
   46#define ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) \ 
   48        Z_ISR_DECLARE(irq_p, ISR_FLAG_DIRECT, isr_p, NULL); \ 
   51#define ARCH_ISR_DIRECT_HEADER() arch_isr_direct_header() 
   52#define ARCH_ISR_DIRECT_FOOTER(swap) arch_isr_direct_footer(swap) 
   54#ifdef CONFIG_TRACING_ISR 
   61#ifdef CONFIG_TRACING_ISR 
   68extern void __soc_handle_irq(
unsigned long mcause);
 
   75        __asm__ 
volatile(
"csrr %0, mcause" : 
"=r" (mcause));
 
   76        mcause &= SOC_MCAUSE_EXP_MASK;
 
   79        __soc_handle_irq(mcause);
 
   84#ifdef CONFIG_TRACING_ISR 
   92#define ARCH_ISR_DIRECT_DECLARE(name) \ 
   93        static inline int name##_body(void); \ 
   94        __attribute__ ((interrupt)) void name(void) \ 
   96                ISR_DIRECT_HEADER(); \ 
   98                ISR_DIRECT_FOOTER(0); \ 
  100        static inline int name##_body(void) 
static ALWAYS_INLINE _cpu_t * arch_curr_cpu(void)
Definition: arch_inlines.h:17
 
void arch_irq_disable(unsigned int irq)
 
int arch_irq_is_enabled(unsigned int irq)
 
void arch_irq_enable(unsigned int irq)
 
static void arch_isr_direct_footer(int swap)
Definition: irq.h:70
 
static void arch_isr_direct_header(void)
Definition: irq.h:59
 
void sys_trace_isr_enter(void)
Called when entering an ISR.
 
void sys_trace_isr_exit(void)
Called when exiting an ISR.
 
Public interface for configuring interrupts.
 
flags
Definition: parser.h:96
 
__UINT32_TYPE__ uint32_t
Definition: stdint.h:90
 
Software-managed ISR table.