cache.h

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/*
 * Copyright (c) 2015 Wind River Systems, Inc.
 * Copyright (c) 2022 Carlo Caione <ccaione@baylibre.com>
 *
 * SPDX-License-Identifier: Apache-2.0
 */
 
#ifndef ZEPHYR_INCLUDE_CACHE_H_
#define ZEPHYR_INCLUDE_CACHE_H_
 
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
#if defined(CONFIG_EXTERNAL_CACHE)
 
/*
 * External cache API driver interface mirrored in
 * include/zephyr/drivers/cache.h
 */
 
#if defined(CONFIG_DCACHE)
 
extern void cache_data_enable(void);
extern void cache_data_disable(void);
 
extern int cache_data_flush_all(void);
extern int cache_data_invd_all(void);
extern int cache_data_flush_and_invd_all(void);
 
extern int cache_data_flush_range(void *addr, size_t size);
extern int cache_data_invd_range(void *addr, size_t size);
extern int cache_data_flush_and_invd_range(void *addr, size_t size);
 
#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
extern size_t cache_data_line_size_get(void);
#endif /* CONFIG_DCACHE_LINE_SIZE_DETECT */
 
#endif /* CONFIG_DCACHE */
 
#if defined(CONFIG_ICACHE)
 
extern void cache_instr_enable(void);
extern void cache_instr_disable(void);
 
extern int cache_instr_flush_all(void);
extern int cache_instr_invd_all(void);
extern int cache_instr_flush_and_invd_all(void);
 
extern int cache_instr_flush_range(void *addr, size_t size);
extern int cache_instr_invd_range(void *addr, size_t size);
extern int cache_instr_flush_and_invd_range(void *addr, size_t size);
 
#if defined(CONFIG_ICACHE_LINE_SIZE_DETECT)
extern size_t cache_instr_line_size_get(void);
#endif /* CONFIG_ICACHE_LINE_SIZE_DETECT */
 
#endif /* CONFIG_ICACHE */
 
#else /* CONFIG_ARCH_CACHE */
 
/*
 * Arch cache API interface mirrored in
 * include/zephyr/sys/arch_interface.h
 */
 
#if defined(CONFIG_DCACHE)
 
#define cache_data_enable                       arch_dcache_enable
#define cache_data_disable                      arch_dcache_disable
 
#define cache_data_flush_all                    arch_dcache_flush_all
#define cache_data_invd_all                     arch_dcache_invd_all
#define cache_data_flush_and_invd_all           arch_dcache_flush_and_invd_all
 
#define cache_data_flush_range(addr, size)      arch_dcache_flush_range(addr, size)
#define cache_data_invd_range(addr, size)       arch_dcache_invd_range(addr, size)
#define cache_data_flush_and_invd_range(addr, size)     \
                                                arch_dcache_flush_and_invd_range(addr, size)
 
#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
#define cache_data_line_size_get                arch_dcache_line_size_get
#endif /* CONFIG_DCACHE_LINE_SIZE_DETECT */
 
#endif /* CONFIG_DCACHE */
 
#if defined(CONFIG_ICACHE)
 
#define cache_instr_enable                      arch_icache_enable
#define cache_instr_disable                     arch_icache_disable
 
#define cache_instr_flush_all                   arch_icache_flush_all
#define cache_instr_invd_all                    arch_icache_invd_all
#define cache_instr_flush_and_invd_all          arch_icache_flush_and_invd_all
 
#define cache_instr_flush_range(addr, size)     arch_icache_flush_range(addr, size)
#define cache_instr_invd_range(addr, size)      arch_icache_invd_range(addr, size)
#define cache_instr_flush_and_invd_range(addr, size)    \
                                                arch_icache_flush_and_invd_range(addr, size)
 
#if defined(CONFIG_ICACHE_LINE_SIZE_DETECT)
#define cache_instr_line_size_get               arch_icache_line_size_get
#endif /* CONFIG_ICACHE_LINE_SIZE_DETECT */
 
#endif /* CONFIG_ICACHE */
#endif /* CONFIG_EXTERNAL_CACHE */
 
 
#define _CPU DT_PATH(cpus, cpu_0)
 
static inline void sys_cache_data_enable(void)
{
#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
        cache_data_enable();
#endif
}
 
static inline void sys_cache_data_disable(void)
{
#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
        cache_data_disable();
#endif
}
 
static inline void sys_cache_instr_enable(void)
{
#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
        cache_instr_enable();
#endif
}
 
static inline void sys_cache_instr_disable(void)
{
#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
        cache_instr_disable();
#endif
}
 
static inline int sys_cache_data_flush_all(void)
{
#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
        return cache_data_flush_all();
#endif
        return -ENOTSUP;
}
 
static inline int sys_cache_instr_flush_all(void)
{
#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
        return cache_instr_flush_all();
#endif
        return -ENOTSUP;
}
 
static inline int sys_cache_data_invd_all(void)
{
#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
        return cache_data_invd_all();
#endif
        return -ENOTSUP;
}
 
static inline int sys_cache_instr_invd_all(void)
{
#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
        return cache_instr_invd_all();
#endif
        return -ENOTSUP;
}
 
static inline int sys_cache_data_flush_and_invd_all(void)
{
#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
        return cache_data_flush_and_invd_all();
#endif
        return -ENOTSUP;
}
 
static inline int sys_cache_instr_flush_and_invd_all(void)
{
#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
        return cache_instr_flush_and_invd_all();
#endif
        return -ENOTSUP;
}
 
__syscall int sys_cache_data_flush_range(void *addr, size_t size);
static inline int z_impl_sys_cache_data_flush_range(void *addr, size_t size)
{
#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
        return cache_data_flush_range(addr, size);
#endif
        ARG_UNUSED(addr);
        ARG_UNUSED(size);
 
        return -ENOTSUP;
}
 
static inline int sys_cache_instr_flush_range(void *addr, size_t size)
{
#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
        return cache_instr_flush_range(addr, size);
#endif
        ARG_UNUSED(addr);
        ARG_UNUSED(size);
 
        return -ENOTSUP;
}
 
__syscall int sys_cache_data_invd_range(void *addr, size_t size);
static inline int z_impl_sys_cache_data_invd_range(void *addr, size_t size)
{
#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
        return cache_data_invd_range(addr, size);
#endif
        ARG_UNUSED(addr);
        ARG_UNUSED(size);
 
        return -ENOTSUP;
}
 
static inline int sys_cache_instr_invd_range(void *addr, size_t size)
{
#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
        return cache_instr_invd_range(addr, size);
#endif
        ARG_UNUSED(addr);
        ARG_UNUSED(size);
 
        return -ENOTSUP;
}
 
__syscall int sys_cache_data_flush_and_invd_range(void *addr, size_t size);
static inline int z_impl_sys_cache_data_flush_and_invd_range(void *addr, size_t size)
{
#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_DCACHE)
        return cache_data_flush_and_invd_range(addr, size);
#endif
        ARG_UNUSED(addr);
        ARG_UNUSED(size);
 
        return -ENOTSUP;
}
 
static inline int sys_cache_instr_flush_and_invd_range(void *addr, size_t size)
{
#if defined(CONFIG_CACHE_MANAGEMENT) && defined(CONFIG_ICACHE)
        return cache_instr_flush_and_invd_range(addr, size);
#endif
        ARG_UNUSED(addr);
        ARG_UNUSED(size);
 
        return -ENOTSUP;
}
 
static inline size_t sys_cache_data_line_size_get(void)
{
#ifdef CONFIG_DCACHE_LINE_SIZE_DETECT
        return cache_data_line_size_get();
#elif (CONFIG_DCACHE_LINE_SIZE != 0)
        return CONFIG_DCACHE_LINE_SIZE;
#else
        return DT_PROP_OR(_CPU, d_cache_line_size, 0);
#endif
}
 
static inline size_t sys_cache_instr_line_size_get(void)
{
#ifdef CONFIG_ICACHE_LINE_SIZE_DETECT
        return cache_instr_line_size_get();
#elif (CONFIG_ICACHE_LINE_SIZE != 0)
        return CONFIG_ICACHE_LINE_SIZE;
#else
        return DT_PROP_OR(_CPU, i_cache_line_size, 0);
#endif
}
 
#ifdef CONFIG_LIBMETAL
static inline void sys_cache_flush(void *addr, size_t size)
{
        sys_cache_data_flush_range(addr, size);
}
#endif
 
#include <syscalls/cache.h>
#ifdef __cplusplus
}
#endif
 
#endif /* ZEPHYR_INCLUDE_CACHE_H_ */