cache.h

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/*
 * Copyright (c) 2023 Carlo Caione <ccaione@baylibre.com>
 *
 * SPDX-License-Identifier: Apache-2.0
 */
 
#ifndef ZEPHYR_INCLUDE_ARCH_CACHE_H_
#define ZEPHYR_INCLUDE_ARCH_CACHE_H_
 
#if defined(CONFIG_ARM64)
#include <zephyr/arch/arm64/cache.h>
#elif defined(CONFIG_XTENSA)
#include <zephyr/arch/xtensa/cache.h>
#endif
 
#if defined(CONFIG_DCACHE)
 
extern void arch_dcache_enable(void);
 
#define cache_data_enable arch_dcache_enable
 
extern void arch_dcache_disable(void);
 
#define cache_data_disable arch_dcache_disable
 
extern int arch_dcache_flush_all(void);
 
#define cache_data_flush_all arch_dcache_flush_all
 
extern int arch_dcache_invd_all(void);
 
#define cache_data_invd_all arch_dcache_invd_all
 
extern int arch_dcache_flush_and_invd_all(void);
 
#define cache_data_flush_and_invd_all arch_dcache_flush_and_invd_all
 
extern int arch_dcache_flush_range(void *addr, size_t size);
 
#define cache_data_flush_range(addr, size) arch_dcache_flush_range(addr, size)
 
extern int arch_dcache_invd_range(void *addr, size_t size);
 
#define cache_data_invd_range(addr, size) arch_dcache_invd_range(addr, size)
 
extern int arch_dcache_flush_and_invd_range(void *addr, size_t size);
 
#define cache_data_flush_and_invd_range(addr, size) \
        arch_dcache_flush_and_invd_range(addr, size)
 
#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
 
extern size_t arch_dcache_line_size_get(void);
 
#define cache_data_line_size_get arch_dcache_line_size_get
 
#endif /* CONFIG_DCACHE_LINE_SIZE_DETECT */
 
#endif /* CONFIG_DCACHE */
 
#if defined(CONFIG_ICACHE)
 
extern void arch_icache_enable(void);
 
#define cache_instr_enable arch_icache_enable
 
extern void arch_icache_disable(void);
 
#define cache_instr_disable arch_icache_disable
 
extern int arch_icache_flush_all(void);
 
#define cache_instr_flush_all arch_icache_flush_all
 
extern int arch_icache_invd_all(void);
 
#define cache_instr_invd_all arch_icache_invd_all
 
extern int arch_icache_flush_and_invd_all(void);
 
#define cache_instr_flush_and_invd_all arch_icache_flush_and_invd_all
 
extern int arch_icache_flush_range(void *addr, size_t size);
 
#define cache_instr_flush_range(addr, size) arch_icache_flush_range(addr, size)
 
extern int arch_icache_invd_range(void *addr, size_t size);
 
#define cache_instr_invd_range(addr, size) arch_icache_invd_range(addr, size)
 
extern int arch_icache_flush_and_invd_range(void *addr, size_t size);
 
#define cache_instr_flush_and_invd_range(addr, size) \
        arch_icache_flush_and_invd_range(addr, size)
 
#if defined(CONFIG_ICACHE_LINE_SIZE_DETECT)
 
extern size_t arch_icache_line_size_get(void);
 
#define cache_instr_line_size_get arch_icache_line_size_get
 
#endif /* CONFIG_ICACHE_LINE_SIZE_DETECT */
 
#endif /* CONFIG_ICACHE */
 
#endif /* ZEPHYR_INCLUDE_ARCH_CACHE_H_ */