:orphan:
.. raw:: html
.. dtcompatible:: nxp,lpc11u6x-pinctrl
.. _dtbinding_nxp_lpc11u6x_pinctrl:
nxp,lpc11u6x-pinctrl
####################
Vendor: :ref:`NXP Semiconductors `
Description
***********
.. code-block:: none
LPC pinctrl node. This node defines pin configurations in pin groups, and has
the 'pinctrl' node identifier in the SOC's devicetree. Each group within the
pin configuration defines a peripheral's pin configuration. Each numbered
subgroup represents pins with shared configuration for that peripheral. The
'pinmux' property of each group selects the pins to be configured with these
properties. For example, here is a configuration for FLEXCOMM0 pins:
pinmux_flexcomm0_usart: pinmux_flexcomm0_usart {
group0 {
pinmux = ,
;
slew-rate = "standard";
};
};
If only the required properties are supplied, the ICON_PIO register will
be assigned the following values:
IOCON_FUNC=,
IOCON_MODE=0,
IOCON_SLEW=,
IOCON_INVERT=0,
IOCON_DIGIMODE=1,
IOCON_OD=0,
Values for I2C type and analog type pins have the following defaults:
IOCON_ASW=0
IOCON_SSEL=0
IOCON_FILTEROFF=1
IOCON_ECS=0
IOCON_EGP=1
IOCON_I2CFILTER=1
Note the inherited pinctrl properties defined below have the following effects:
drive-open-drain: IOCON_OD=1
bias-pull-up: IOCON_MODE=2
bias-pull-down: IOCON_MODE=1
drive-push-pull: IOCON_MODE=3
Note: for the LPC11u6x, the following fields are also supported:
IOCON_HYS- set by input-schmitt-enable
IOCON_S_MODE- set by nxp,digital-filter
IOCON_CLKDIV- set by nxp,filter-clock-div
IOCON_FILTR- set by nxp,analog-filter
Properties
**********
Top level properties
====================
These property descriptions apply to "nxp,lpc11u6x-pinctrl"
nodes themselves. This page also describes child node
properties in the following sections.
.. tabs::
.. group-tab:: Node specific properties
Properties not inherited from the base binding file.
(None)
.. group-tab:: Deprecated node specific properties
Deprecated properties not inherited from the base binding file.
(None)
.. group-tab:: Base properties
Properties inherited from the base binding file, which defines
common properties that may be set on many nodes. Not all of these
may apply to the "nxp,lpc11u6x-pinctrl" compatible.
.. list-table::
:widths: 1 1 4
:header-rows: 1
* - Name
- Type
- Details
* - ``status``
- ``string``
- .. code-block:: none
indicates the operational status of a device
Legal values: ``'ok'``, ``'okay'``, ``'disabled'``, ``'reserved'``, ``'fail'``, ``'fail-sss'``
See :ref:`zephyr:dt-important-props` for more information.
* - ``compatible``
- ``string-array``
- .. code-block:: none
compatible strings
This property is **required**.
See :ref:`zephyr:dt-important-props` for more information.
* - ``reg``
- ``array``
- .. code-block:: none
register space
See :ref:`zephyr:dt-important-props` for more information.
* - ``reg-names``
- ``string-array``
- .. code-block:: none
name of each register space
* - ``interrupts``
- ``array``
- .. code-block:: none
interrupts for device
See :ref:`zephyr:dt-important-props` for more information.
* - ``interrupts-extended``
- ``compound``
- .. code-block:: none
extended interrupt specifier for device
* - ``interrupt-names``
- ``string-array``
- .. code-block:: none
name of each interrupt
* - ``interrupt-parent``
- ``phandle``
- .. code-block:: none
phandle to interrupt controller node
* - ``label``
- ``string``
- .. code-block:: none
Human readable string describing the device (used as device_get_binding() argument)
See :ref:`zephyr:dt-important-props` for more information.
This property is **deprecated**.
* - ``clocks``
- ``phandle-array``
- .. code-block:: none
Clock gate information
* - ``clock-names``
- ``string-array``
- .. code-block:: none
name of each clock
* - ``#address-cells``
- ``int``
- .. code-block:: none
number of address cells in reg property
* - ``#size-cells``
- ``int``
- .. code-block:: none
number of size cells in reg property
* - ``dmas``
- ``phandle-array``
- .. code-block:: none
DMA channels specifiers
* - ``dma-names``
- ``string-array``
- .. code-block:: none
Provided names of DMA channel specifiers
* - ``io-channels``
- ``phandle-array``
- .. code-block:: none
IO channels specifiers
* - ``io-channel-names``
- ``string-array``
- .. code-block:: none
Provided names of IO channel specifiers
* - ``mboxes``
- ``phandle-array``
- .. code-block:: none
mailbox / IPM channels specifiers
* - ``mbox-names``
- ``string-array``
- .. code-block:: none
Provided names of mailbox / IPM channel specifiers
* - ``wakeup-source``
- ``boolean``
- .. code-block:: none
Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
* - ``power-domain``
- ``phandle``
- .. code-block:: none
Power domain the device belongs to.
The device will be notified when the power domain it belongs to is either
suspended or resumed.
* - ``zephyr,pm-device-runtime-auto``
- ``boolean``
- .. code-block:: none
Automatically configure the device for runtime power management after the
init function runs.
Grandchild node properties
==========================
.. list-table::
:widths: 1 1 4
:header-rows: 1
* - Name
- Type
- Details
* - ``nxp,digital-filter``
- ``int``
- .. code-block:: none
Enable digital filter. Set number of clock cycles to use as rejection
threshold for input pulses. 0 disables the filter. Only valid for
lpc11u6x SOC. Filter defaults to disabled, as this is default reset
value for SOC
Legal values: ``0``, ``1``, ``2``, ``3``
* - ``nxp,filter-clock-div``
- ``int``
- .. code-block:: none
set peripheral clock divider for input filter sampling clock
IOCONCLKDIV. Only valid for lpc11u6x SOC. Default to 0, as this
is the default reset value for the SOC.
Legal values: ``0``, ``1``, ``2``, ``3``, ``4``, ``5``, ``6``
* - ``nxp,disable-analog-filter``
- ``boolean``
- .. code-block:: none
Disable fixed 10 ns input glitch analog filter. Only valid for lpc11u6x
SOC, on analog pins. Note that this filter is enabled on reset, hence
the choice to make disabling the filter opt-in
* - ``pinmux``
- ``array``
- .. code-block:: none
Pin mux selection for this group. See the SOC level pinctrl header
file in NXP's HAL for a defined list of these options.
This property is **required**.
* - ``nxp,invert``
- ``boolean``
- .. code-block:: none
Invert the pin input logic level
* - ``nxp,analog-mode``
- ``boolean``
- .. code-block:: none
Set the pin to analog mode. Sets DIGIMODE=0, and ASW=1. Only valid for
analog type pins. Selects ASW0 on LPC55s3x family
* - ``nxp,i2c-filter``
- ``string``
- .. code-block:: none
I2C glitch filter speed. Only valid for I2C mode pins. Fast mode
typically only required for High speed I2C.
Legal values: ``'slow'``, ``'fast'``
* - ``nxp,i2c-mode``
- ``boolean``
- .. code-block:: none
Enable I2C mode for a pin. If not present, pin is in GPIO mode. Only
valid for I2C mode pins
* - ``bias-pull-up``
- ``boolean``
- .. code-block:: none
enable pull-up resistor
* - ``bias-pull-down``
- ``boolean``
- .. code-block:: none
enable pull-down resistor
* - ``drive-push-pull``
- ``boolean``
- .. code-block:: none
drive actively high and low
* - ``drive-open-drain``
- ``boolean``
- .. code-block:: none
drive with open drain (hardware AND)
* - ``input-schmitt-enable``
- ``boolean``
- .. code-block:: none
enable schmitt-trigger mode