:orphan:
.. raw:: html
.. dtcompatible:: microchip,xec-pcr
.. _dtbinding_microchip_xec_pcr:
microchip,xec-pcr
#################
Vendor: :ref:`Microchip Technology Inc. `
Description
***********
.. code-block:: none
Microchip XEC Power Clock Reset and VBAT register (PCR)
Properties
**********
.. tabs::
.. group-tab:: Node specific properties
Properties not inherited from the base binding file.
.. list-table::
:widths: 1 1 4
:header-rows: 1
* - Name
- Type
- Details
* - ``#clock-cells``
- ``int``
- .. code-block:: none
Number of items to expect in a Clock specifier
This property is **required**.
Constant value: ``3``
* - ``pinctrl-0``
- ``phandles``
- .. code-block:: none
Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.
* - ``pinctrl-1``
- ``phandles``
- .. code-block:: none
Pin configuration/s for the second state. See pinctrl-0.
* - ``pinctrl-2``
- ``phandles``
- .. code-block:: none
Pin configuration/s for the third state. See pinctrl-0.
* - ``pinctrl-3``
- ``phandles``
- .. code-block:: none
Pin configuration/s for the fourth state. See pinctrl-0.
* - ``pinctrl-4``
- ``phandles``
- .. code-block:: none
Pin configuration/s for the fifth state. See pinctrl-0.
* - ``pinctrl-names``
- ``string-array``
- .. code-block:: none
Names for the provided states. The number of names needs to match the
number of states.
* - ``core-clock-div``
- ``int``
- .. code-block:: none
Divide 96 MHz PLL clock to produce Cortex-M4 core clock
This property is **required**.
* - ``slow-clock-div``
- ``int``
- .. code-block:: none
PWM and TACH clock domain divided down from 48 MHz AHB clock. The
default value is 480 for 100 kHz.
* - ``pll-32k-src``
- ``int``
- .. code-block:: none
32 KHz clock source for PLL
This property is **required**.
* - ``periph-32k-src``
- ``int``
- .. code-block:: none
32 KHz clock source for peripherals
This property is **required**.
* - ``xtal-single-ended``
- ``boolean``
- .. code-block:: none
Use single ended crystal connection to XTAL2 pin.
* - ``clk32kmon-period-min``
- ``int``
- .. code-block:: none
32KHz clock monitor minimum valid 32KHz period in 48MHz units
This property is **required**.
* - ``clk32kmon-period-max``
- ``int``
- .. code-block:: none
32KHz clock monitor maximum valid 32KHz period in 48MHz units
This property is **required**.
* - ``clk32kmon-duty-cycle-var-max``
- ``int``
- .. code-block:: none
Maximum duty cycle variation. Difference in units of 48HMz between
the measured 32KHz high and low pulse widths.
This property is **required**.
* - ``clk32kmon-valid-min``
- ``int``
- .. code-block:: none
Minimum number of consecutive 32KHz pulses that pass all monitor tests
This property is **required**.
* - ``xtal-enable-delay-ms``
- ``int``
- .. code-block:: none
Delay in milliseconds after crystal is enabled and clock monitor is
started.
This property is **required**.
Default value: ``300``
* - ``pll-lock-timeout-ms``
- ``int``
- .. code-block:: none
Timeout in milliseconds waiting for PLL to lock to new clock source.
This property is **required**.
Default value: ``30``
* - ``clkmon-bypass``
- ``boolean``
- .. code-block:: none
Bypass clkmon check of crystal or XTAL2 single-ended clock.
* - ``internal-osc-disable``
- ``boolean``
- .. code-block:: none
If the internal silicon 32KHz oscillator is not chosen as the source
for PLL and Periheral devices then disable the internal 32KHz
oscillator to save power.
.. group-tab:: Deprecated node specific properties
Deprecated properties not inherited from the base binding file.
(None)
.. group-tab:: Base properties
Properties inherited from the base binding file, which defines
common properties that may be set on many nodes. Not all of these
may apply to the "microchip,xec-pcr" compatible.
.. list-table::
:widths: 1 1 4
:header-rows: 1
* - Name
- Type
- Details
* - ``wakeup-source``
- ``boolean``
- .. code-block:: none
Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
* - ``power-domain``
- ``phandle``
- .. code-block:: none
Power domain the device belongs to.
The device will be notified when the power domain it belongs to is either
suspended or resumed.
* - ``zephyr,pm-device-runtime-auto``
- ``boolean``
- .. code-block:: none
Automatically configure the device for runtime power management after the
init function runs.
* - ``zephyr,disabling-power-states``
- ``phandles``
- .. code-block:: none
List of power states that will disable this device power.
* - ``status``
- ``string``
- .. code-block:: none
indicates the operational status of a device
Legal values: ``'ok'``, ``'okay'``, ``'disabled'``, ``'reserved'``, ``'fail'``, ``'fail-sss'``
See :ref:`zephyr:dt-important-props` for more information.
* - ``compatible``
- ``string-array``
- .. code-block:: none
compatible strings
This property is **required**.
See :ref:`zephyr:dt-important-props` for more information.
* - ``reg``
- ``array``
- .. code-block:: none
register space
This property is **required**.
See :ref:`zephyr:dt-important-props` for more information.
* - ``reg-names``
- ``string-array``
- .. code-block:: none
name of each register space
* - ``interrupts``
- ``array``
- .. code-block:: none
interrupts for device
See :ref:`zephyr:dt-important-props` for more information.
* - ``interrupts-extended``
- ``compound``
- .. code-block:: none
extended interrupt specifier for device
* - ``interrupt-names``
- ``string-array``
- .. code-block:: none
name of each interrupt
* - ``interrupt-parent``
- ``phandle``
- .. code-block:: none
phandle to interrupt controller node
* - ``label``
- ``string``
- .. code-block:: none
Human readable string describing the device (used as device_get_binding() argument)
See :ref:`zephyr:dt-important-props` for more information.
This property is **deprecated**.
* - ``clocks``
- ``phandle-array``
- .. code-block:: none
Clock gate information
* - ``clock-names``
- ``string-array``
- .. code-block:: none
name of each clock
* - ``#address-cells``
- ``int``
- .. code-block:: none
number of address cells in reg property
* - ``#size-cells``
- ``int``
- .. code-block:: none
number of size cells in reg property
* - ``dmas``
- ``phandle-array``
- .. code-block:: none
DMA channels specifiers
* - ``dma-names``
- ``string-array``
- .. code-block:: none
Provided names of DMA channel specifiers
* - ``io-channels``
- ``phandle-array``
- .. code-block:: none
IO channels specifiers
* - ``io-channel-names``
- ``string-array``
- .. code-block:: none
Provided names of IO channel specifiers
* - ``mboxes``
- ``phandle-array``
- .. code-block:: none
mailbox / IPM channels specifiers
* - ``mbox-names``
- ``string-array``
- .. code-block:: none
Provided names of mailbox / IPM channel specifiers
* - ``zephyr,deferred-init``
- ``boolean``
- .. code-block:: none
Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
Specifier cell names
********************
- clock cells: regidx, bitpos, domain