:orphan:
.. raw:: html
.. _dtbinding_adi_max30009_i2c:
adi,max30009 (on i2c bus)
#########################
.. sidebar:: Overview
:Name: ``adi,max30009``
:Vendor: :ref:`Analog Devices, Inc. `
:Used in: :zephyr:board-catalog:`List of boards <#compatibles=adi,max30009>` using
this compatible
:Driver: :zephyr_file:`drivers/sensor/adi/max30009/max30009.c`
Description
***********
.. code-block:: none
MAX30009 Bio-Impedance AFE with I2C connection
Properties
**********
.. tabs::
.. group-tab:: Node specific properties
Properties not inherited from the base binding file.
.. list-table::
:widths: 1 1 4
:header-rows: 1
* - Name
- Type
- Details
* - ``supply-gpios``
- ``phandle-array``
- .. code-block:: none
GPIO specifier that controls power to the device.
This property should be provided when the device has a dedicated
switch that controls power to the device. The supply state is
entirely the responsibility of the device driver.
Contrast with vin-supply.
* - ``vin-supply``
- ``phandle``
- .. code-block:: none
Reference to the regulator that controls power to the device.
The referenced devicetree node must have a regulator compatible.
This property should be provided when device power is supplied
by a shared regulator. The supply state is dependent on the
request status of all devices fed by the regulator.
Contrast with supply-gpios. If both properties are provided
then the regulator must be requested before the supply GPIOS is
set to an active state, and the supply GPIOS must be set to an
inactive state before releasing the regulator.
* - ``int-gpios``
- ``phandle-array``
- .. code-block:: none
Interrupt (INT) pin. The MAX30009 INT output is active low and open-drain
by default; the property value should describe the signal presented to the SoC.
* - ``fifo-watermark``
- ``int``
- .. code-block:: none
Specify the FIFO watermark level in frame count.
Default value is the reset value.
Default value: ``129``
Value range: ``1`` to ``256``
* - ``fifo-a-full-type``
- ``boolean``
- .. code-block:: none
A_FULL_TYPE sets the A_FULL interrupt behavior. When cleared, A_FULL
reasserts every sample while the almost-full condition persists; when set,
A_FULL asserts once and does not reassert until the FIFO is read and a new
almost-full condition occurs. Cleared at reset.
* - ``fifo-rollover``
- ``boolean``
- .. code-block:: none
FIFO_RO enables FIFO roll-over. When set, the FIFO keeps pushing samples
once full and overwrites the oldest data (write and read pointers both
advance); when cleared, new samples are dropped until the FIFO is read.
Disabled at reset.
* - ``ref-clk-source``
- ``int``
- .. code-block:: none
PLL reference clock source (REF_CLK_SEL). "internal" selects one of the
on-chip slow oscillators; "external" selects the clock driven on the FCLK
pin. Defaults to "internal", matching the device reset state.
Default value: ``0``
Legal values: ``0``, ``1``
* - ``clk-freq-sel``
- ``int``
- .. code-block:: none
PLL reference clock frequency in Hz (CLK_FREQ_SEL). When ref-clk-source is
"internal" this selects which on-chip oscillator is used; when "external"
it must match the frequency of the clock supplied on FCLK. Defaults to
32768 Hz.
Default value: ``32768``
Legal values: ``32000``, ``32768``
* - ``clk-fine-tune``
- ``int``
- .. code-block:: none
Fine-tune trim for the internal slow oscillator (CLK_FINE_TUNE, 5-bit
two's-complement code, 0.2% per LSB). Defaults to 0 (no shift).
Default value: ``0``
Value range: ``0`` to ``31``
* - ``pll-multiplier``
- ``int``
- .. code-block:: none
PLL feedback multiplier M, programmed into MDIV as M = MDIV + 1. Choose M
so PLL_CLK = M x REF_CLK lands in 14-28 MHz. Defaults to 444 (the MDIV
reset value of 443).
Default value: ``444``
Value range: ``427`` to ``875``
* - ``bioz-adc-clk-div``
- ``int``
- .. code-block:: none
BioZ ADC clock divider (NDIV), dividing PLL_CLK to derive the BioZ ADC
sample clock. Defaults to 512 (the NDIV reset value).
Default value: ``512``
Legal values: ``512``, ``1024``
* - ``bioz-synth-clk-div``
- ``int``
- .. code-block:: none
BioZ frequency-synthesis clock divider (KDIV), dividing PLL_CLK to derive
the DDS DAC clock. Defaults to 1 (the KDIV reset value).
Default value: ``1``
Legal values: ``1``, ``2``, ``4``, ``8``, ``16``, ``32``, ``64``, ``128``, ``256``, ``512``, ``1024``, ``2048``, ``4096``, ``8192``
* - ``bioz-adc-osr``
- ``int``
- .. code-block:: none
BioZ ADC oversampling ratio (BIOZ_ADC_OSR) for the I and Q ADCs. Defaults
to 8 (the reset value).
Default value: ``8``
Legal values: ``8``, ``16``, ``32``, ``64``, ``128``, ``256``, ``512``, ``1024``
* - ``bioz-dac-osr``
- ``int``
- .. code-block:: none
BioZ DDS DAC oversampling ratio (BIOZ_DAC_OSR). Defaults to 32 (the reset
value).
Default value: ``32``
Legal values: ``32``, ``64``, ``128``, ``256``
* - ``bioz-i-en``
- ``boolean``
- .. code-block:: none
Enable the in-phase (I) BioZ drive and receive channel (BIOZ_I_EN). Also
turns on the PLL and bandgap bias. Disabled at reset (channel off when
this property is omitted).
* - ``bioz-q-en``
- ``boolean``
- .. code-block:: none
Enable the quadrature-phase (Q) BioZ drive and receive channel
(BIOZ_Q_EN). Also turns on the PLL and bandgap bias. Disabled at reset
(channel off when this property is omitted).
* - ``bioz-bg-en``
- ``boolean``
- .. code-block:: none
Enable the BioZ bandgap bias. Disabled
at reset (channel off when this property is omitted).
* - ``bioz-dhpf``
- ``int``
- .. code-block:: none
BioZ digital high-pass filter cutoff (BIOZ_DHPF[1:0]), expressed as a
register code with the cutoff given relative to the BioZ sample rate.
Defaults to 0 (bypass, the reset value).
Default value: ``0``
Legal values: ``0``, ``1``, ``2``
* - ``bioz-dlpf``
- ``int``
- .. code-block:: none
BioZ digital low-pass filter cutoff (BIOZ_DLPF[2:0]), expressed as a
register code with the cutoff given relative to the BioZ sample rate.
Defaults to 0 (bypass, the reset value).
Default value: ``0``
Legal values: ``0``, ``1``, ``2``, ``3``, ``4``
* - ``en-bioz-thresh``
- ``boolean``
- .. code-block:: none
Enable the BioZ threshold detector (EN_BIOZ_THRESH), comparing the
bioz-cmp-selected data against bioz-high-threshold and bioz-low-threshold.
Disabled at reset.
* - ``bioz-cmp``
- ``int``
- .. code-block:: none
BioZ comparator selection (BIOZ_CMP[1:0]). 0=I, 1=Q, 2=Z. Defaults to 0 (I channel).
Default value: ``0``
Legal values: ``0``, ``1``, ``2``
* - ``bioz-drv-mode``
- ``int``
- .. code-block:: none
Stimulus type driven onto the electrodes by the BioZ transmit channel
(BIOZ_DRV_MODE[1:0]). Defaults to 0 (current drive, the reset value).
Default value: ``0``
Legal values: ``0``, ``1``, ``2``, ``3``
* - ``bioz-idrv-rge``
- ``int``
- .. code-block:: none
Internal current-range resistor (BIOZ_IDRV_RGE), setting the current
magnitude when bioz-ext-res is disabled.
Default value: ``0``
Legal values: ``0``, ``1``, ``2``, ``3``
* - ``bioz-vdrv-mag``
- ``int``
- .. code-block:: none
In voltage drive mode, BIOZ_VDRV_MAG sets the voltage amplitude at DRVR,
which is connected to EL1. BIOZ_IDRV_RGE is ignored. In current drive mode,
BIOZ_VDRV_MAG and BIOZ_IDRV_RGE set the current magnitude.
Default value: ``0``
Legal values: ``0``, ``1``, ``2``, ``3``
* - ``bioz-ext-res``
- ``boolean``
- .. code-block:: none
Enable external resistor (REXT) for BioZ current magnitude setting. When
disabled (0), internal range resistors set by BIOZ_IDRV_RGE and BIOZ_VDRV_MAG
are used. When enabled (1), REXT and BIOZ_VDRV_MAG set the current magnitude.
* - ``loff-rapid``
- ``boolean``
- .. code-block:: none
LOFF_RAPID bypasses the approximately 128ms window delay for DC lead-off detection.
* - ``bioz-fast-start-en``
- ``boolean``
- .. code-block:: none
BIOZ_FAST_START_EN enables the fast-start mode, which connects
the BIP and BIN inputs to VMID_RX through 10kΩ resistors after enabling the I or Q channel.
* - ``bioz-fast-manual``
- ``boolean``
- .. code-block:: none
BIOZ_FAST_MANUAL is used to turn on the fast-start mode manually.
* - ``bioz-ahpf``
- ``int``
- .. code-block:: none
BioZ analog high-pass filter cutoff (BIOZ_AHPF[1:0]), expressed as a
register code with the cutoff given relative to the BioZ sample rate.
Defaults to 0 (bypass, the reset value).
Default value: ``0``
Legal values: ``0``, ``1``, ``2``, ``3``, ``4``, ``5``, ``6``, ``7``, ``8``, ``9``, ``10``, ``11``, ``12``, ``13``, ``14``, ``15``
* - ``bioz-ina-mode``
- ``int``
- .. code-block:: none
BioZ INA mode (BIOZ_INA_MODE) configures the instrumentation amplifier
for either high power (low noise) or low power operation.
Defaults to 0 (high power mode, the reset value).
Default value: ``0``
Legal values: ``0``, ``1``
* - ``bioz-dm-dis``
- ``boolean``
- .. code-block:: none
BIOZ_DM_DIS disables the receive channel demodulators.
* - ``bioz-gain``
- ``int``
- .. code-block:: none
BIOZ_GAIN set the combined gain of the BioZ receive channel's INA and PGAs.
Defaults to 0 (1x gain, the reset value).
Default value: ``0``
Legal values: ``0``, ``1``, ``2``, ``3``
* - ``bioz-ext-cap``
- ``boolean``
- .. code-block:: none
BIOZ_EXT_CAP selects the external capacitor (CEXT) connected between
the DRVXC and DRVSJ.
* - ``bioz-dc-restore``
- ``int``
- .. code-block:: none
BIOZ_DC_RESTORE controls the DC restore switch in the current-generator.
Default value: ``0``
Legal values: ``0``, ``1``
* - ``bioz-amp-rge``
- ``int``
- .. code-block:: none
Selects the output stage option for the voltage-drive amplifier
and current-drive amplifier within the BioZ transmit channel.
Default value: ``0``
Legal values: ``0``, ``1``, ``2``, ``3``
* - ``bioz-amp-bw``
- ``int``
- .. code-block:: none
BIOZ_AMP_BW sets the gain bandwidth of the BioZ transmit channel's
voltage-drive and current-drive amplifiers. Defaults to 0 (low bandwidth).
Default value: ``0``
Legal values: ``0``, ``1``, ``2``, ``3``
* - ``bioz-low-threshold``
- ``int``
- .. code-block:: none
BioZ under-range threshold (BIOZ_LO_THRESH[7:0], 8-bit register code),
compared against the symmetric band +/-32 x code. Only active when
en-bioz-thresh is set. Defaults to 0 (the reset value).
Default value: ``0``
Value range: ``0`` to ``255``
* - ``bioz-high-threshold``
- ``int``
- .. code-block:: none
BioZ over-range threshold (BIOZ_HI_THRESH[7:0], 8-bit register code),
compared against the symmetric band +/-2048 x code. Only active when
en-bioz-thresh is set. Defaults to 255 (the reset value).
Default value: ``255``
Value range: ``0`` to ``255``
* - ``bioz-stby-on``
- ``boolean``
- .. code-block:: none
BIOZ_STBY_ON keeps the receive channel's amplifiers, demodulators, and ADCs
enabled while the transmit channel is in standby (bioz-drv-mode = 3),
allowing faster wake-up. Disabled at reset.
* - ``bioz-q-clk-phase``
- ``int``
- .. code-block:: none
BIOZ_Q_CLK_PHASE sets the Q channel demodulator clock phase relative to the
stimulus. 0 = quadrature phase (normal); 1 = in phase. Defaults to 0 (the
reset value).
Default value: ``0``
Legal values: ``0``, ``1``
* - ``bioz-i-clk-phase``
- ``int``
- .. code-block:: none
BIOZ_I_CLK_PHASE sets the I channel demodulator clock phase relative to the
stimulus. 0 = in phase (normal); 1 = quadrature phase. Defaults to 0 (the
reset value).
Default value: ``0``
Legal values: ``0``, ``1``
* - ``bioz-ina-chop-en``
- ``boolean``
- .. code-block:: none
BIOZ_INA_CHOP_EN enables chopping in the BioZ receive channel's
instrumentation amplifier; the chopping frequency is BIOZ_ADC_CLK / 2. INA
chopping is recommended except when F_BIOZ = BIOZ_ADC_CLK / 2. Disabled at
reset.
* - ``bioz-ch-fsel``
- ``boolean``
- .. code-block:: none
BIOZ_CH_FSEL selects the BioZ receive PGA/AAF chopping frequency: disabled
(0) is BIOZ_ADC_CLK / 8, enabled (1) is BIOZ_ADC_CLK / 4. Set to 1 when
F_BIOZ = BIOZ_ADC_CLK / 8. Disabled at reset.
* - ``bmux-rsel``
- ``int``
- .. code-block:: none
BMUX_RSEL selects the resistive calibration load across DRVP/BIP and
DRVN/BIN for non-GSR applications (BMUX_RSEL[1:0]), applied only when
bmux-bist-en is set. Defaults to 0 (5100 ohm, the reset value).
Default value: ``0``
Legal values: ``0``, ``1``, ``2``, ``3``
* - ``bmux-bist-en``
- ``boolean``
- .. code-block:: none
BMUX_BIST_EN connects the built-in self-test resistor (value from
bmux-rsel) between DRVP/BIP and DRVN/BIN for non-GSR applications. Disabled
at reset.
* - ``connect-cal-only``
- ``boolean``
- .. code-block:: none
CONNECT_CAL_ONLY, when set with mux-en and cal-en, connects only the
CAL1-CAL4 pins and disconnects the ELx pins. Disabled at reset.
* - ``mux-en``
- ``boolean``
- .. code-block:: none
MUX_EN enables the BioZ input/output MUX connections to the ELx and/or CALx
pins. When disabled all ELx and CALx pins are disconnected. Disabled at
reset.
* - ``cal-en``
- ``boolean``
- .. code-block:: none
CAL_EN connects the calibration pins (CAL1=DRVP, CAL2=BIP, CAL3=BIN,
CAL4=DRVN) to measure the external calibration resistor when mux-en is set,
disconnecting the electrode pins. Disabled at reset.
* - ``bmux-gsr-rsel``
- ``int``
- .. code-block:: none
BMUX_GSR_RSEL selects the resistive calibration load across DRVP/BIP and
DRVN/BIN for GSR applications (BMUX_GSR_RSEL[1:0]), applied only when
gsr-load-en is set. Defaults to 0 (25.7 kohm, the reset value).
Default value: ``0``
Legal values: ``0``, ``1``, ``2``, ``3``
* - ``gsr-load-en``
- ``boolean``
- .. code-block:: none
GSR_LOAD_EN connects the built-in GSR load resistor (value from
bmux-gsr-rsel) between DRVP/BIP and DRVN/BIN. Disabled at reset.
* - ``en-ext-inload``
- ``boolean``
- .. code-block:: none
EN_EXT_INLOAD enables the external guard-trace-drive circuit, which outputs
the buffered voltage from BIP and BIN onto the EL2A and EL3A pins. Disabled
at reset.
* - ``en-int-inload``
- ``boolean``
- .. code-block:: none
EN_INT_INLOAD enables the circuit that compensates for input capacitive
loading on BIN and BIP. Disabled at reset.
* - ``bip-assign``
- ``int``
- .. code-block:: none
BIP_ASSIGN selects the electrode pin for the BioZ positive input (BIP) when
mux-en is set (BIP_ASSIGN[1:0]); ignored when cal-en is set. Defaults to 0
(EL1, the reset value).
Default value: ``0``
Legal values: ``0``, ``1``, ``2``
* - ``bin-assign``
- ``int``
- .. code-block:: none
BIN_ASSIGN selects the electrode pin for the BioZ negative input (BIN) when
mux-en is set (BIN_ASSIGN[1:0]); ignored when cal-en is set. Defaults to 0
(EL4, the reset value).
Default value: ``0``
Legal values: ``0``, ``1``, ``2``
* - ``drvp-assign``
- ``int``
- .. code-block:: none
DRVP_ASSIGN selects the electrode pin for the BioZ positive drive (DRVP) in
current mode when mux-en is set (DRVP_ASSIGN[1:0]); ignored when cal-en is
set, and forced to EL1 in voltage or H-bridge mode. EL1 has the lowest
on-resistance; assign DRVP to EL1 for currents of 64 uA or greater. Defaults
to 0 (EL1, the reset value).
Default value: ``0``
Legal values: ``0``, ``1``, ``2``
* - ``drvn-assign``
- ``int``
- .. code-block:: none
DRVN_ASSIGN selects the electrode pin for the BioZ negative drive (DRVN) in
current mode when mux-en is set (DRVN_ASSIGN[1:0]); ignored when cal-en is
set, and forced to EL4 in voltage or H-bridge mode. EL4 has the lowest
on-resistance; assign DRVN to EL4 for currents of 64 uA or greater. Defaults
to 0 (EL4, the reset value).
Default value: ``0``
Legal values: ``0``, ``1``, ``2``
* - ``en-lon-det``
- ``boolean``
- .. code-block:: none
EN_LON_DET enables ultra-low-power DC lead-on detection on BIP and BIN. Only
functions when BioZ is disabled (bioz-i-en = bioz-q-en = 0). Disabled at
reset.
* - ``en-loff-det``
- ``boolean``
- .. code-block:: none
EN_LOFF_DET enables DC lead-off detection on BIP and BIN. Only functions
when BioZ is enabled (bioz-i-en or bioz-q-en set). Disabled at reset.
* - ``en-ext-loff``
- ``boolean``
- .. code-block:: none
EN_EXT_LOFF applies DC lead-off detection externally through EL2B and EL3B
for AC-coupled BioZ inputs on EL2A/EL3A, instead of the internal BIP/BIN
nodes. Disabled at reset.
* - ``en-drv-oor``
- ``boolean``
- .. code-block:: none
EN_DRV_OOR enables the DRVN voltage monitor that detects drive-electrode
lead-off via an out-of-range AC voltage (DRV_OOR status). Disabled at reset.
* - ``loff-ipol``
- ``int``
- .. code-block:: none
LOFF_IPOL sets the polarity of the matched DC lead-off current sources.
Defaults to 0 (non-inverted, the reset value).
Default value: ``0``
Legal values: ``0``, ``1``
* - ``loff-imag``
- ``int``
- .. code-block:: none
LOFF_IMAG selects the DC lead-off current amplitude (LOFF_IMAG[2:0]).
Defaults to 0 (current sources disabled, the reset value).
Default value: ``0``
Legal values: ``0``, ``1``, ``2``, ``3``, ``4``, ``5``
* - ``loff-thresh``
- ``int``
- .. code-block:: none
LOFF_THRESH selects the DC lead-off comparator voltage threshold around
VMID_RX (LOFF_THRESH[3:0], 4-bit code from VMID_RX +/-215 mV at 0 to
+/-665 mV at 15, 30 mV per step). Defaults to 0 (the reset value).
Default value: ``0``
Value range: ``0`` to ``15``
* - ``rbias-value``
- ``int``
- .. code-block:: none
RBIAS_VALUE selects the BioZ input lead bias resistance between BIP/BIN and
VMID_RX (RBIAS_VALUE[1:0]), applied when en-rbias-bip or en-rbias-bin is
set. Defaults to 0 (50 Mohm, the reset value).
Default value: ``0``
Legal values: ``0``, ``1``, ``2``
* - ``en-rbias-bip``
- ``boolean``
- .. code-block:: none
EN_RBIAS_BIP connects BIP to VMID_RX through the resistor selected by
rbias-value. Disabled at reset.
* - ``en-rbias-bin``
- ``boolean``
- .. code-block:: none
EN_RBIAS_BIN connects BIN to VMID_RX through the resistor selected by
rbias-value. Disabled at reset.
* - ``friendly-name``
- ``string``
- .. code-block:: none
Human readable string describing the sensor. It can be used to
distinguish multiple instances of the same model (e.g., lid accelerometer
vs. base accelerometer in a laptop) to a host operating system.
This property is defined in the Generic Sensor Property Usages of the HID
Usage Tables specification
(https://usb.org/sites/default/files/hut1_3_0.pdf, section 22.5).
.. group-tab:: Deprecated node specific properties
Deprecated properties not inherited from the base binding file.
(None)
.. group-tab:: Base properties
Properties inherited from the base binding file, which defines
common properties that may be set on many nodes. Not all of these
may apply to the "adi,max30009" compatible.
.. list-table::
:widths: 1 1 4
:header-rows: 1
* - Name
- Type
- Details
* - ``reg``
- ``array``
- .. code-block:: none
device address on i2c bus
This property is **required**.
See :ref:`zephyr:dt-important-props` for more information.
* - ``status``
- ``string``
- .. code-block:: none
Indicates the operational status of the hardware or other
resource that the node represents. In particular:
- "okay" means the resource is operational and, for example,
can be used by device drivers
- "disabled" means the resource is not operational and the system
should treat it as if it is not present
For details, see "2.3.4 status" in Devicetree Specification v0.4.
Legal values: ``okay``, ``disabled``, ``reserved``, ``fail``, ``fail-sss``
See :ref:`zephyr:dt-important-props` for more information.
* - ``compatible``
- ``string-array``
- .. code-block:: none
This property is a list of strings that essentially define what
type of hardware or other resource this devicetree node
represents. Each device driver checks for specific compatible
property values to find the devicetree nodes that represent
resources that the driver should manage.
The recommended format is "vendor,device", The "vendor" part is
an abbreviated name of the vendor. The "device" is usually from
the datasheet.
The compatible property can have multiple values, ordered from
most- to least-specific. Having additional values is useful when the
device is a specific instance of a more general family, to allow the
system to match the most specific driver available.
For details, see "2.3.1 compatible" in Devicetree Specification v0.4.
This property is **required**.
See :ref:`zephyr:dt-important-props` for more information.
* - ``reg-names``
- ``string-array``
- .. code-block:: none
Optional names given to each register block in the "reg" property.
For example:
/ {
soc {
#address-cells = <1>;
#size-cells = <1>;
uart@1000 {
reg = <0x1000 0x2000>, <0x3000 0x4000>;
reg-names = "foo", "bar";
};
};
};
The uart@1000 node has two register blocks:
- one with base address 0x1000, size 0x2000, and name "foo"
- another with base address 0x3000, size 0x4000, and name "bar"
* - ``ranges``
- ``compound``
- .. code-block:: none
Information used to define a mapping (or translation) between the address
space of a bus (the "child address space") and the address space of the
bus node's parent (the "parent address space").
The "ranges" property is typically empty, or a sequence of triplets
(child bus address, parent bus address, length).
If the "ranges" property is empty, it specifies that the parent and child
address spaces are identical and no address translation is required.
If the "ranges" property is not present in a bus node, it is assumed that
no mapping exists between children of the node and the parent address space.
For details, see "2.3.8 ranges" in Devicetree Specification v0.4.
* - ``interrupts``
- ``array``
- .. code-block:: none
Information about interrupts generated by the device, encoded as an array
of one or more interrupt specifiers. The format of the data in this property
varies by where the device appears in the interrupt tree. Devices with the same
"interrupt-parent" will use the same format in their interrupts properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
See :ref:`zephyr:dt-important-props` for more information.
* - ``interrupts-extended``
- ``compound``
- .. code-block:: none
Extended interrupt specifier for device, used as an alternative to
the "interrupts" property.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
* - ``interrupt-names``
- ``string-array``
- .. code-block:: none
Optional names given to each interrupt generated by a device.
The interrupts themselves are defined in either "interrupts" or
"interrupts-extended" properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
* - ``interrupt-parent``
- ``phandle``
- .. code-block:: none
If present, this refers to the node which handles interrupts generated
by this device.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
* - ``label``
- ``string``
- .. code-block:: none
Human readable string describing the device. Use of this property is
deprecated except as needed on a case-by-case basis.
For details, see "4.1.2 Miscellaneous Properties" in Devicetree
Specification v0.4.
See :ref:`zephyr:dt-important-props` for more information.
* - ``clocks``
- ``phandle-array``
- .. code-block:: none
Information about the device's clock providers. In general, this property
should follow conventions established in the dt-schema binding:
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml
* - ``clock-names``
- ``string-array``
- .. code-block:: none
Optional names given to each clock provider in the "clocks" property.
* - ``#address-cells``
- ``int``
- .. code-block:: none
This property encodes the number of cells used by address fields
in "reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
* - ``#size-cells``
- ``int``
- .. code-block:: none
This property encodes the number of cells used by size fields in
"reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
* - ``dma-coherent``
- ``boolean``
- .. code-block:: none
Indicates that the device is capable of coherent DMA operations.
For details, see "2.3.10 dma-coherent" in Devicetree Specification v0.4.
* - ``dmas``
- ``phandle-array``
- .. code-block:: none
DMA channel specifiers relevant to the device.
* - ``dma-names``
- ``string-array``
- .. code-block:: none
Optional names given to the DMA channel specifiers in the "dmas" property.
* - ``io-channels``
- ``phandle-array``
- .. code-block:: none
IO channel specifiers relevant to the device.
* - ``io-channel-names``
- ``string-array``
- .. code-block:: none
Optional names given to the IO channel specifiers in the "io-channels" property.
* - ``mboxes``
- ``phandle-array``
- .. code-block:: none
Mailbox / IPM channel specifiers relevant to the device.
* - ``mbox-names``
- ``string-array``
- .. code-block:: none
Optional names given to the mbox specifiers in the "mboxes" property.
* - ``power-domains``
- ``phandle-array``
- .. code-block:: none
Power domain specifiers relevant to the device.
* - ``power-domain-names``
- ``string-array``
- .. code-block:: none
Optional names given to the power domain specifiers in the "power-domains" property.
* - ``#power-domain-cells``
- ``int``
- .. code-block:: none
Number of cells in power-domains property
* - ``hwlocks``
- ``phandle-array``
- .. code-block:: none
HW spinlock id relevant to the device.
* - ``hwlock-names``
- ``string-array``
- .. code-block:: none
Optional names given to the hwlock specifiers in the "hwlocks" property.
* - ``zephyr,deferred-init``
- ``boolean``
- .. code-block:: none
Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
* - ``wakeup-source``
- ``boolean``
- .. code-block:: none
Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
* - ``zephyr,pm-device-runtime-auto``
- ``boolean``
- .. code-block:: none
Automatically configure the device for runtime power management after the
init function runs.
* - ``zephyr,disabling-power-states``
- ``phandles``
- .. code-block:: none
List of power states that will disable this device power.