microchip,xec-dmac

Vendor: Microchip Technology Inc.

Description

These nodes are “dma” bus nodes.

Microchip XEC DMA controller

Properties

Properties not inherited from the base binding file.

Name

Type

Details

#dma-cells

int

Number of items to expect in a DMA specifier

This property is required.

Constant value: 2

dma-channel-mask

int

Bitmask of available DMA channels in ascending order that are
not reserved by firmware and are available to the
kernel. i.e. first channel corresponds to LSB.

dma-channels

int

Number of DMA channels supported by the controller

dma-requests

int

Number of DMA request signals supported by the controller.

dma-buf-addr-alignment

int

Memory address alignment requirement for DMA buffers used by the controller.

dma-buf-size-alignment

int

Memory size alignment requirement for DMA buffers used by the controller.

dma-copy-alignment

int

Minimal chunk of data possible to be copied by the controller.

pcrs

array

PCR register index and bit position

This property is required.

girqs

array

Encoded interrupt information

This property is required.

aggregated-girq

phandle

If DMA driver uses aggregated interrupt mode
provide the handle to the GIRQ.

pcr-cells

int

Constant value: 2

girq-cells

int

Constant value: 2

Specifier cell names

  • dma cells: channel, trigsrc

  • pcr cells: regidx, bitpos

  • girq cells: girqno, girqpos