st,stm32u5-dma

Vendor: STMicroelectronics N.V.

Note

An implementation of a driver matching this compatible is available in drivers/dma/dma_stm32u5.c.

Description

These nodes are “dma” bus nodes.

STM32 DMA controller for the stm32U5 soc family

It is present on stm32U5 devices as a GP DMA
This controller includes several channels with different requests.
DMA clients connected to the STM32 DMA controller must use a three-cell
specifier for each channel.
For the client part, example for stm32u585 on GPDMA1 instance
  Tx using channel 0 with request 7
  Rx using channel 1 with request 6
  spi1 {
   dmas = <&gpdma1 0 7 0x10440>,
          <&gpdma1 1 6 0x10480>;
   dma-names = "tx", "rx";
  };
It is a phandle to the DMA controller plus the following three integer cells
  1. channel: the stream or channel from 0 to (<dma-channels> - 1).
  2. slot: DMA periph request ID, which is written in the REQSEL bits of the CxTR2
  the slot is a value between <0> .. (<dma-requests> - 1).
  3. channel-config: A 32bit mask specifying the DMA channel configuration
  which is device dependent:
      -bit 6-7 : Direction  (see dma.h)
             0x0: MEM to MEM
             0x1: MEM to PERIPH
             0x2: PERIPH to MEM
             0x3: reserved for PERIPH to PERIPH
      -bit 9 : Peripheral Increment Address
             0x0: no address increment between transfers
             0x1: increment address between transfers
      -bit 10 : Memory Increment Address
             0x0: no address increment between transfers
             0x1: increment address between transfers
      -bit 11-12 : Peripheral data size
             0x0: Byte (8 bits)
             0x1: Half-word (16 bits)
             0x2: Word (32 bits)
             0x3: reserved
      -bit 13-14 : Memory data size
             0x0: Byte (8 bits)
             0x1: Half-word (16 bits)
             0x2: Word (32 bits)
             0x3: reserved
      -bit 15: Reserved
      -bit 16-17 : Priority level
             0x0: low
             0x1: medium
             0x2: high
             0x3: very high

Properties

Node specific properties

Properties not inherited from the base binding file.

Name	Type	Details
#dma-cells	int	Number of items to expect in a DMA specifier This property is required. Constant value: 3
st,mem2mem	boolean	If the DMA controller V1 supports memory to memory transfer
dma-offset	int	offset in the table of channels when mapping to a DMAMUX for 1st dma instance, offset is 0, for 2nd dma instance, offset is the nb of dma channels of the 1st dma, for 3rd dma instance, offset is the nb of dma channels of the 2nd dma plus the nb of dma channels of the 1st dma instance, etc.
dma-channel-mask	int	Bitmask of available DMA channels in ascending order that are not reserved by firmware and are available to the kernel. i.e. first channel corresponds to LSB.
dma-channels	int	Number of DMA channels supported by the controller
dma-requests	int	Number of DMA request signals supported by the controller.
dma-buf-addr-alignment	int	Memory address alignment requirement for DMA buffers used by the controller.
dma-buf-size-alignment	int	Memory size alignment requirement for DMA buffers used by the controller.
dma-copy-alignment	int	Minimal chunk of data possible to be copied by the controller.

Deprecated node specific properties

Deprecated properties not inherited from the base binding file.

(None)

Base properties

Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “st,stm32u5-dma” compatible.

Name	Type	Details
reg	array	register space This property is required. See Important properties for more information.
interrupts	array	interrupts for device This property is required. See Important properties for more information.
status	string	indicates the operational status of a device Legal values: 'ok', 'okay', 'disabled', 'reserved', 'fail', 'fail-sss' See Important properties for more information.
compatible	string-array	compatible strings This property is required. See Important properties for more information.
reg-names	string-array	name of each register space
interrupts-extended	compound	extended interrupt specifier for device
interrupt-names	string-array	name of each interrupt
interrupt-parent	phandle	phandle to interrupt controller node
label	string	Human readable string describing the device (used as device_get_binding() argument) See Important properties for more information. This property is deprecated.
clocks	phandle-array	Clock gate information
clock-names	string-array	name of each clock
#address-cells	int	number of address cells in reg property
#size-cells	int	number of size cells in reg property
dmas	phandle-array	DMA channels specifiers
dma-names	string-array	Provided names of DMA channel specifiers
io-channels	phandle-array	IO channels specifiers
io-channel-names	string-array	Provided names of IO channel specifiers
mboxes	phandle-array	mailbox / IPM channels specifiers
mbox-names	string-array	Provided names of mailbox / IPM channel specifiers
power-domains	phandle-array	Power domain specifiers
power-domain-names	string-array	Provided names of power domain specifiers
#power-domain-cells	int	Number of cells in power-domains property
zephyr,deferred-init	boolean	Do not initialize device automatically on boot. Device should be manually initialized using device_init().
wakeup-source	boolean	Property to identify that a device can be used as wake up source. When this property is provided a specific flag is set into the device that tells the system that the device is capable of wake up the system. Wake up capable devices are disabled (interruptions will not wake up the system) by default but they can be enabled at runtime if necessary.
zephyr,pm-device-runtime-auto	boolean	Automatically configure the device for runtime power management after the init function runs.
zephyr,disabling-power-states	phandles	List of power states that will disable this device power.

Specifier cell names

• dma cells: channel, slot, channel-config