nxp,imx-lpi2c

Vendor: NXP Semiconductors N.V.

Description

These nodes are “i2c” bus nodes.

NXP i.MX LPI2C controller

Properties

Properties not inherited from the base binding file.

Name

Type

Details

clock-frequency

int

Initial clock frequency in Hz

sq-size

int

Size of the submission queue for blocking requests

Default value: 4

cq-size

int

Size of the completion queue for blocking requests

Default value: 4

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.

bus-idle-timeout

int

Bus idle timeout in nanoseconds

scl-gpios

phandle-array

GPIO to which the I2C SCL signal is routed. This is only needed for I2C bus recovery
support.

sda-gpios

phandle-array

GPIO to which the I2C SDA signal is routed. This is only needed for I2C bus recovery
support.