atmel,sam-smc
Description
Atmel Static Memory Controller (SMC).
The SMC allows to interface with static-memory mapped external devices such as
SRAM, PSRAM, PROM, EPROM, EEPROM, LCD Module, NOR Flash and NAND Flash.
The SMC is clocked through the Master Clock (MCK) which is controlled by the
Power Management Controller (PMC).
The SMC controller can have up to 4 children defining the connected external
memory devices. The reg property is set to the device's Chip Select.
Device Tree example taken from the sam4_xplained board:
&smc {
status = "okay";
pinctrl-0 = <&smc_default>;
pinctrl-names = "default";
is66wv51216dbll@0 {
reg = <0>;
atmel,smc-data-bus-width = <8>;
atmel,smc-write-mode = "nwe";
atmel,smc-read-mode = "nrd";
atmel,smc-setup-timing = <1 1 1 1>;
atmel,smc-pulse-timing = <6 6 6 6>;
atmel,smc-cycle-timing = <7 7>;
};
};
The above example configures an is66wv51216dbll-55 device using the
controller's default 8-bit interface. The device is a low power static RAM
which uses NWE and NRD signals connected to the WE and OE inputs
respectively. Assuming that MCK is 120 MHz (CPU at full speed), each MCK
cycle is approximately 8.33 ns. Since the memory full cycle is 55 ns, as per
specification, it requires atmel,smc-cycle-timing of at least 7 cycles
(approximately 58.33 ns). The atmel,smc-cycle-timing is composed of three
parts: setup, pulse and hold. The setup is used to address the memory. The
pulse is the time used to read/write. The hold is used to release memory.
For the is66wv51216dbll-55 a minimum setup of 5 ns (1 cycle) with at least
45 ns (6 cycles) for CPU read/write and no hold time is required.
Note: Since no hold parameter is available at SMC the atmel,smc-cycle-timing
should have additional cycles to accommodate for hold values.
No Hold Time:
cycle-timing (7) = setup (1) + pulse (6) + hold (0)
With 3 Hold Times:
cycle-timing (10) = setup (1) + pulse (6) + hold (3)
A 16-bit CY62157EV30LL-45BVXI SRAM connected to a SAME70 SMC can be
configured as follows:
&smc {
status = "okay";
pinctrl-0 = <&smc_default>;
pinctrl-names = "default";
ext_sram_bus: ext-sram@0 {
reg = <0>;
atmel,smc-data-bus-width = <16>;
atmel,smc-write-mode = "nwe";
atmel,smc-read-mode = "nrd";
atmel,smc-setup-timing = <1 1 1 1>;
/*
* MCK is 300 MHz on SAME70, so one cycle is approximately 3.33 ns.
* 14 cycles is the minimum value that meets the 45 ns access time.
*/
atmel,smc-pulse-timing = <14 14 14 14>;
atmel,smc-cycle-timing = <15 15>;
status = "okay";
};
};
Finally, in order to make the memory available you will need to define new
memory device/s in DeviceTree:
sram1: sram@60000000 {
compatible = "zephyr,memory-region", "mmio-sram";
device_type = "memory";
reg = <0x60000000 DT_SIZE_K(512)>;
zephyr,memory-region = "SRAM1";
};
Properties
Top level properties
These property descriptions apply to “atmel,sam-smc” nodes themselves. This page also describes child node properties in the following sections.
Node specific properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
|---|---|---|
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Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.
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Pin configuration/s for the second state. See pinctrl-0.
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Pin configuration/s for the third state. See pinctrl-0.
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Pin configuration/s for the fourth state. See pinctrl-0.
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Pin configuration/s for the fifth state. See pinctrl-0.
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Names for the provided states. The number of names needs to match the
number of states.
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Deprecated node specific properties
Deprecated properties not inherited from the base binding file.
(None)
Base properties
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “atmel,sam-smc” compatible.
Name |
Type |
Details |
|---|---|---|
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Information used to address the device. The value is specific to
the device (i.e. is different depending on the compatible
property).
The "reg" property is typically a sequence of (address, length) pairs.
Each pair is called a "register block". Values are
conventionally written in hex.
For details, see "2.3.6 reg" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
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Information about the device's clock providers. In general, this property
should follow conventions established in the dt-schema binding:
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml
This property is required. |
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This property encodes the number of <u32> cells used by address fields
in "reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
This property is required. Constant value: |
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This property encodes the number of <u32> cells used by size fields in
"reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
This property is required. Constant value: |
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Indicates the operational status of the hardware or other
resource that the node represents. In particular:
- "okay" means the resource is operational and, for example,
can be used by device drivers
- "disabled" means the resource is not operational and the system
should treat it as if it is not present
For details, see "2.3.4 status" in Devicetree Specification v0.4.
Legal values: See Important properties for more information. |
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This property is a list of strings that essentially define what
type of hardware or other resource this devicetree node
represents. Each device driver checks for specific compatible
property values to find the devicetree nodes that represent
resources that the driver should manage.
The recommended format is "vendor,device", The "vendor" part is
an abbreviated name of the vendor. The "device" is usually from
the datasheet.
The compatible property can have multiple values, ordered from
most- to least-specific. Having additional values is useful when the
device is a specific instance of a more general family, to allow the
system to match the most specific driver available.
For details, see "2.3.1 compatible" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
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Optional names given to each register block in the "reg" property.
For example:
/ {
soc {
#address-cells = <1>;
#size-cells = <1>;
uart@1000 {
reg = <0x1000 0x2000>, <0x3000 0x4000>;
reg-names = "foo", "bar";
};
};
};
The uart@1000 node has two register blocks:
- one with base address 0x1000, size 0x2000, and name "foo"
- another with base address 0x3000, size 0x4000, and name "bar"
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Information used to define a mapping (or translation) between the address
space of a bus (the "child address space") and the address space of the
bus node's parent (the "parent address space").
The "ranges" property is typically empty, or a sequence of triplets
(child bus address, parent bus address, length).
If the "ranges" property is empty, it specifies that the parent and child
address spaces are identical and no address translation is required.
If the "ranges" property is not present in a bus node, it is assumed that
no mapping exists between children of the node and the parent address space.
For details, see "2.3.8 ranges" in Devicetree Specification v0.4.
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Information about interrupts generated by the device, encoded as an array
of one or more interrupt specifiers. The format of the data in this property
varies by where the device appears in the interrupt tree. Devices with the same
"interrupt-parent" will use the same format in their interrupts properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
See Important properties for more information. |
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Extended interrupt specifier for device, used as an alternative to
the "interrupts" property.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Optional names given to each interrupt generated by a device.
The interrupts themselves are defined in either "interrupts" or
"interrupts-extended" properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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If present, this refers to the node which handles interrupts generated
by this device.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Human readable string describing the device. Use of this property is
deprecated except as needed on a case-by-case basis.
For details, see "4.1.2 Miscellaneous Properties" in Devicetree
Specification v0.4.
See Important properties for more information. |
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Optional names given to each clock provider in the "clocks" property.
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Indicates that the device is capable of coherent DMA operations.
For details, see "2.3.10 dma-coherent" in Devicetree Specification v0.4.
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DMA channel specifiers relevant to the device.
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Optional names given to the DMA channel specifiers in the "dmas" property.
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IO channel specifiers relevant to the device.
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Optional names given to the IO channel specifiers in the "io-channels" property.
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Mailbox / IPM channel specifiers relevant to the device.
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Optional names given to the mbox specifiers in the "mboxes" property.
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Power domain specifiers relevant to the device.
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Optional names given to the power domain specifiers in the "power-domains" property.
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Number of cells in power-domains property
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HW spinlock id relevant to the device.
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Optional names given to the hwlock specifiers in the "hwlocks" property.
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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Child node properties
Name |
Type |
Details |
|---|---|---|
|
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The device's SMC Chip Select number.
Valid range: 0 - 3
This property is required. See Important properties for more information. |
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Select which signal is used for the write operation, either the chip
select (ncs) or a dedicated write enable pin (nwe). The data is put
on the bus during the pulse and hold steps of that signal.
The internal data buffers are switched to output mode after the NCS_WR
or NWE setup time.
This property is required. Legal values: |
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Select which signal is used for the read operation, either the chip
select (ncs) or a dedicated output enable pin (nrd). The data is read
from the bus during the pulse and hold steps of that signal.
This property is required. Legal values: |
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This value is used to setup memory region (set address). The setup
values is an array of the signals NWE, NCS_WR, NRD and NCS_RD
where each value is configured in terms of MCK cycles. The SMC
controller allows use of setups value of 0 (no delays) when
consecutive reads/writes are used. Each value is encoded in
6 bits where the highest bit adds an offset of 128 cycles.
The effective value for each element is: 128 x setup[5] + setup[4:0]
This property is required. |
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This value is used to effectively read/write at memory region (pulse phase).
The pulse value is an array of the signals NWE, NCS_WR, NRD and NCS_RD where
each value is configured in terms of MCK cycles and a value of 0 is forbidden.
Each value is encoded in 7 bits where the highest bit adds an offset of 256
cycles. The effective value for each element is: 256 x pulse[6] + pulse[5:0]
This property is required. |
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SMC timing configurations in cycles for the total write and read
length respectively.
This value describes the entire write/read operation timing which
is defined as: cycle = setup + pulse + hold
Value has to be greater or equal to setup + pulse timing and
is encoded in 9 bits where the two highest bits are multiplied
with an offset of 256.
Effective value for each element: 256 x cycle[8:7] + cycle[6:0]
This property is required. |
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External data bus width used by the connected device.
Legal values: |
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Selects how byte-access cycles are handled by the connected device.
Legal values: |
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Enable page mode for the connected device when supported.
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Page size, in bytes, used when page mode is enabled.
Legal values: |