st,stm32-ospi
Vendor: STMicroelectronics N.V.
Description
These nodes are “ospi” bus nodes.
STM32 OSPI device representation. Enabling a stm32 octospi node in a board
description would typically requires this:
&octospi {
pinctrl-0 = <&octospi_clk_pe9 &octospi_ncs_pe10 &octospi_dqs_pe11
&octospi_io0_pe12 &octospi_io1_pe13
&octospi_io2_pe14 &octospi_io3_pe15
&octospi_io4_pe16 &octospi_io5_pe17
&octospi_io6_pe18 &octospi_io7_pe19>;
dmas = <&dma1 5 41 0x10000>;
dma-names = "tx_rx";
status = "okay";
};
Properties
Node specific properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
|---|---|---|
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Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.
This property is required. |
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Names for the provided states. The number of names needs to match the
number of states.
This property is required. |
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Enables Delay Block (DLYB) Bypass.
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Enables Sample Shifting half-cycle.
It is recommended to be enabled in STR mode and disabled in DTR mode.
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Specifies which port of the OCTOSPI IO Manager is used for the IO[3:0] pins.
If absent, then `IOPORT_<n>_LOW` is used where `n` is the OSPI
instance number.
Note: You might need to enable the OCTOSPI I/O manager clock to use the
property. Please refer to Reference Manual.
The clock can be enabled in the devicetree.
Legal values: |
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Specifies which port of the OCTOSPI IO Manager is used for the IO[7:4] pins.
If absent, then `IOPORT_<n>_HIGH` is used where `n` is the OSPI
instance number.
Can be set to `IOPORT_NONE` for Single SPI, Dual SPI and Quad SPI.
Note: You might need to enable the OCTOSPI I/O manager clock to use the
property. Please refer to Reference Manual.
The clock can be enabled in the devicetree.
Legal values: |
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Specifies which port of the OCTOSPI IO Manager is used for the clk pin.
If absent, then n is used where `n` is the OSPI
instance number.
Note: You might need to enable the OCTOSPI I/O manager clock to use the
property. Please refer to Reference Manual.
The clock can be enabled in the devicetree.
Legal values: |
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Specifies which port of the OCTOSPI IO Manager is used for the dqs pin.
If absent, then n is used where `n` is the OSPI
instance number.
Note: You might need to enable the OCTOSPI I/O manager clock to use the
property. Please refer to Reference Manual.
The clock can be enabled in the devicetree.
Legal values: |
|
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Specifies which port of the OCTOSPI IO Manager is used for the ncs pin.
If absent, then n is used where `n` is the OSPI
instance number.
Note: You might need to enable the OCTOSPI I/O manager clock to use the
property. Please refer to Reference Manual.
The clock can be enabled in the devicetree.
Legal values: |
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Pin configuration/s for the second state. See pinctrl-0.
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Pin configuration/s for the third state. See pinctrl-0.
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Pin configuration/s for the fourth state. See pinctrl-0.
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Pin configuration/s for the fifth state. See pinctrl-0.
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Deprecated node specific properties
Deprecated properties not inherited from the base binding file.
(None)
Base properties
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “st,stm32-ospi” compatible.
Name |
Type |
Details |
|---|---|---|
|
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register space
This property is required. See Important properties for more information. |
|
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interrupts for device
This property is required. See Important properties for more information. |
|
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name of each clock
This property is required. |
|
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Optional DMA channel specifier, required for DMA transactions.
For example dmas for TX/RX on OSPI
dmas = <&dma1 5 41 0x10000>;
With, in each cell of the dmas specifier:
- &dma1: dma controller phandle
- 5: channel number (0 to Max-Channel minus 1). From 0 to 15 on stm32u5x.
- 41: slot number (request which could be given by the DMAMUX)
- 0x10000: channel configuration (only for srce/dest data size, priority)
Notes:
- On series supporting DMAMUX, the DMA phandle should be provided
but DMAMUX node should also be enabled in the DTS.
- For channel configuration, only the config bits priority and
periph/mem datasize are used. The periph/mem datasize must be equal,
0 is a correct value.
- There is no Fifo used by this DMA peripheral.
For example dmas for TX/RX on OSPI
dmas = <&dma1 5 41 0x10000>;
|
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DMA channel name. If DMA should be used, expected value is "tx_rx".
For example
dma-names = "tx_rx";
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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name of each register space
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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Human readable string describing the device (used as device_get_binding() argument)
See Important properties for more information. This property is deprecated. |
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Clock gate information
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number of address cells in reg property
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number of size cells in reg property
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IO channels specifiers
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Provided names of IO channel specifiers
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mailbox / IPM channels specifiers
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Provided names of mailbox / IPM channel specifiers
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Power domain specifiers
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Provided names of power domain specifiers
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Number of cells in power-domains property
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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