syna,sr100-pinctrl
Description
Synaptics SR100 Pin controller Node
Based on pincfg-node.yaml binding.
Note: `bias-disable` and `input-enable` are default pin configurations.
They will be applied in case no `bias-foo` or `input-bar` properties
are set.
Properties
Top level properties
These property descriptions apply to “syna,sr100-pinctrl” nodes themselves. This page also describes child node properties in the following sections.
Node specific properties
Properties not inherited from the base binding file.
(None)
Deprecated node specific properties
Deprecated properties not inherited from the base binding file.
(None)
Base properties
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “syna,sr100-pinctrl” compatible.
Name |
Type |
Details |
|---|---|---|
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Information used to address the device. The value is specific to
the device (i.e. is different depending on the compatible
property).
The "reg" property is typically a sequence of (address, length) pairs.
Each pair is called a "register block". Values are
conventionally written in hex.
For details, see "2.3.6 reg" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
|
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Indicates the operational status of the hardware or other
resource that the node represents. In particular:
- "okay" means the resource is operational and, for example,
can be used by device drivers
- "disabled" means the resource is not operational and the system
should treat it as if it is not present
For details, see "2.3.4 status" in Devicetree Specification v0.4.
Legal values: See Important properties for more information. |
|
|
This property is a list of strings that essentially define what
type of hardware or other resource this devicetree node
represents. Each device driver checks for specific compatible
property values to find the devicetree nodes that represent
resources that the driver should manage.
The recommended format is "vendor,device", The "vendor" part is
an abbreviated name of the vendor. The "device" is usually from
the datasheet.
The compatible property can have multiple values, ordered from
most- to least-specific. Having additional values is useful when the
device is a specific instance of a more general family, to allow the
system to match the most specific driver available.
For details, see "2.3.1 compatible" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
|
|
Optional names given to each register block in the "reg" property.
For example:
/ {
soc {
#address-cells = <1>;
#size-cells = <1>;
uart@1000 {
reg = <0x1000 0x2000>, <0x3000 0x4000>;
reg-names = "foo", "bar";
};
};
};
The uart@1000 node has two register blocks:
- one with base address 0x1000, size 0x2000, and name "foo"
- another with base address 0x3000, size 0x4000, and name "bar"
|
|
|
Information about interrupts generated by the device, encoded as an array
of one or more interrupt specifiers. The format of the data in this property
varies by where the device appears in the interrupt tree. Devices with the same
"interrupt-parent" will use the same format in their interrupts properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
See Important properties for more information. |
|
|
Extended interrupt specifier for device, used as an alternative to
the "interrupts" property.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
|
|
|
Optional names given to each interrupt generated by a device.
The interrupts themselves are defined in either "interrupts" or
"interrupts-extended" properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
|
|
|
If present, this refers to the node which handles interrupts generated
by this device.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
|
|
|
Human readable string describing the device. Use of this property is
deprecated except as needed on a case-by-case basis.
For details, see "4.1.2 Miscellaneous Properties" in Devicetree
Specification v0.4.
See Important properties for more information. |
|
|
Information about the device's clock providers. In general, this property
should follow conventions established in the dt-schema binding:
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml
|
|
|
Optional names given to each clock provider in the "clocks" property.
|
|
|
This property encodes the number of <u32> cells used by address fields
in "reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
|
|
|
This property encodes the number of <u32> cells used by size fields in
"reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
|
|
|
DMA channel specifiers relevant to the device.
|
|
|
Optional names given to the DMA channel specifiers in the "dmas" property.
|
|
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IO channel specifiers relevant to the device.
|
|
|
Optional names given to the IO channel specifiers in the "io-channels" property.
|
|
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Mailbox / IPM channel specifiers relevant to the device.
|
|
|
Optional names given to the mbox specifiers in the "mboxes" property.
|
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Power domain specifiers relevant to the device.
|
|
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Optional names given to the power domain specifiers in the "power-domains" property.
|
|
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Number of cells in power-domains property
|
|
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HW spinlock id relevant to the device.
|
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Optional names given to the hwlock specifiers in the "hwlocks" property.
|
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
|
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
|
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Automatically configure the device for runtime power management after the
init function runs.
|
|
|
List of power states that will disable this device power.
|
Child node properties
Name |
Type |
Details |
|---|---|---|
|
|
Register offset of pin configuration (drive strength, slew-rate etc.).
|
|
|
Port control configuration (input pin routing). The following macro is
available to define this part of the configuration:
- SRXXX_PORT_PINMUX(reg, bit, mode, mask)
|
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|
Pin muxing configuration. The bitfield contains the following fields:
- ctrl [ 0.. 2]: Pinmux controller (0..3): in Global, AON, LPS, SWIRE
- bit [ 3.. 7]: Bit offset in register for pinmux configuration
- mode [ 8..10]: Alternate function
- mask [11..14]: Mask for mode/alternate function setting
- reg [16..23]: Register offset for pinmux configuration
- cfg [24..31]: Register offset for pin configuration
To simplify the usage, macros are available to generate the "pinmux"
field:
- SRXXX_GLOBAL_PINMUX(reg, bit, mode, cfg)
- SRXXX_AON_PINMUX(reg, bit, mode, cfg)
- SRXXX_LPS_PINMUX(reg, bit, mode, cfg)
- SRXXX_SWIRE_PINMUX(bit, mode)
- SRXXX_FIXED_PINMUX(cfg) (for pins with fixed mode/function)
This property is required. |
|
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disable any pin bias
|
|
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latch weakly
|
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enable pull-up resistor
|
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enable pull-down resistor
|
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maximum sink or source current in mA
|
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enable input on pin (e.g. enable an input buffer, no effect on output)
|
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disable input on pin (e.g. disable an input buffer, no effect on output)
|
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enable schmitt-trigger mode
|
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disable schmitt-trigger mode
|
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set the slew rate
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