ns16550

Vendor: Generic or vendor-independent

Description

These nodes are “uart” bus nodes.

ns16550 UART

Properties

Properties not inherited from the base binding file.

Name

Type

Details

clock-frequency

int

Clock frequency information for UART operation

current-speed

int

Initial baud rate setting for UART

hw-flow-control

boolean

Set to enable RTS/CTS flow control at boot time

parity

string

Configures the parity of the adapter. Enumeration id 0 for none, 1 for odd
and 2 for even parity. Default to none if not specified.

Legal values: 'none', 'odd', 'even'

stop-bits

string

Sets the number of stop bits.

Legal values: '0_5', '1', '1_5', '2'

data-bits

int

Sets the number of data bits.

Legal values: 5, 6, 7, 8, 9

vendor-id

int

Vendor ID of the device

device-id

int

Device ID of the device

class-rev

int

Optional class/revision register filter

class-rev-mask

int

Class/revision register mask

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.

resets

phandle-array

Reset information

reset-names

string-array

Name of each reset

reg-shift

int

quantity to shift the register offsets by

This property is required.

pcp

int

custom clock (PRV_CLOCK_PARAMS, if supported)

dlf

int

divisor latch fraction (DLF, if supported)

io-mapped

boolean

specify registers are IO mapped or memory mapped