nordic,nrf-spim
Vendor: Nordic Semiconductor
Description
These nodes are “spi” bus nodes.
Nordic nRF family SPIM (SPI master with EasyDMA)
Properties
Node specific properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
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Enables the workaround for the nRF52832 SoC SPIM PAN 58 anomaly.
Must be used in conjunction with
CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58=y
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Indicates if the SPIM instance has the capability of delaying MISO
sampling. This property needs to be defined at SoC level DTS files.
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Number of 64 MHz clock cycles (15.625 ns) delay from the sampling edge
of SCK (leading or trailing, depending on the CPHA setting used) until
the input serial data on MISO is actually sampled. This property does
not have any effect if the rx-delay-supported property is not set.
Legal values: |
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Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.
This property is required. |
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Names for the provided states. The number of names needs to match the
number of states.
This property is required. |
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Maximum data rate the SPI peripheral can be driven at, in Hz. This
property must be set at SoC level DTS files.
This property is required. |
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Configurable, defaults to 0xff (line high), the most common value used
in SPI transfers.
Default value: |
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Maximum number of bits available in the EasyDMA MAXCNT register. This
property must be set at SoC level DTS files.
This property is required. |
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Optional bi-directional line that allows SPI master to indicate to SPI
slave (by setting the line high) that a transfer is to occur, so that
the latter can prepare (and indicate its readiness) for handling that
transfer when it is actually needed, and stay in any desired low-power
state otherwise.
The protocol is as follows:
- initially, SPI slave configures its WAKE line pin as an input and SPI
master keeps the line in the low state
- when a transfer is to be performed, SPI master configures its WAKE
line pin as an input with pull-up; this changes the line state to
high but allows SPI slave to override that state
- when SPI slave detects the high state of the WAKE line, it prepares
for the transfer and when everything is ready, it drives the WAKE
line low by configuring its pin as an output
- the generated high-to-low transition on the WAKE line is a signal
to SPI master that it can proceed with the transfer
- SPI slave releases the line by configuring its pin back to be an input
and SPI master again keeps the line in the low state
Please note that the line must be configured and properly handled on
both sides for the mechanism to work correctly.
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Clock frequency the SPI peripheral is being driven at, in Hz.
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An array of chip select GPIOs to use. Each element
in the array specifies a GPIO. The index in the array
corresponds to the child node that the CS gpio controls.
Example:
spi@... {
cs-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>,
<&gpio1 10 GPIO_ACTIVE_LOW>,
...;
spi-device@0 {
reg = <0>;
...
};
spi-device@1 {
reg = <1>;
...
};
...
};
The child node "spi-device@0" specifies a SPI device with
chip select controller gpio0, pin 23, and devicetree
GPIO flags GPIO_ACTIVE_LOW. Similarly, "spi-device@1" has CS GPIO
controller gpio1, pin 10, and flags GPIO_ACTIVE_LOW. Additional
devices can be configured in the same way.
If unsure about the flags cell, GPIO_ACTIVE_LOW is generally a safe
choice for a typical "CSn" pin. GPIO_ACTIVE_HIGH may be used if
intervening hardware inverts the signal to the peripheral device or
the line itself is active high.
If this property is not defined, no chip select GPIOs are set.
SPI controllers with dedicated CS pins do not need to define
the cs-gpios property.
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Pin configuration/s for the second state. See pinctrl-0.
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Pin configuration/s for the third state. See pinctrl-0.
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Pin configuration/s for the fourth state. See pinctrl-0.
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Pin configuration/s for the fifth state. See pinctrl-0.
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List of signals that require CLOCKPIN setting enablement.
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List of memory region phandles
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A list of names, one for each corresponding phandle in memory-region
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Deprecated node specific properties
Deprecated properties not inherited from the base binding file.
(None)
Base properties
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “nordic,nrf-spim” compatible.
Name |
Type |
Details |
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register space
This property is required. See Important properties for more information. |
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interrupts for device
This property is required. See Important properties for more information. |
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number of address cells in reg property
This property is required. Constant value: |
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number of size cells in reg property
This property is required. |
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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name of each register space
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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Human readable string describing the device (used as device_get_binding() argument)
See Important properties for more information. This property is deprecated. |
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Clock gate information
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name of each clock
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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mailbox / IPM channels specifiers
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Provided names of mailbox / IPM channel specifiers
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Power domain specifiers
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Provided names of power domain specifiers
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Number of cells in power-domains property
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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