13#ifndef __ZEPHYR_INCLUDE_DRIVERS_ANDES_FLASH_XIP_API_EX_H__
14#define __ZEPHYR_INCLUDE_DRIVERS_ANDES_FLASH_XIP_API_EX_H__
Public API for FLASH drivers.
flash_andes_xip_ex_ops
Enumeration for Andes flash extended operations.
Definition andes_flash_xip_api_ex.h:32
flash_andes_xip_mem_rd_cmd
SPI commands for memory-mapped read mode.
Definition andes_flash_xip_api_ex.h:90
@ FLASH_ANDES_XIP_EX_OP_MEM_READ_CMD
Set the SPI command for memory-mapped read mode.
Definition andes_flash_xip_api_ex.h:80
@ FLASH_ANDES_XIP_EX_OP_SET_STATUS_REGS
Set the three status registers (SR1, SR2, SR3).
Definition andes_flash_xip_api_ex.h:53
@ FLASH_ANDES_XIP_EX_OP_GET_STATUS_REGS
Get the three status registers (SR1, SR2, SR3).
Definition andes_flash_xip_api_ex.h:41
@ FLASH_ANDES_XIP_EX_OP_LOCK_STATE
Get the current state of the software status register lock.
Definition andes_flash_xip_api_ex.h:70
@ FLASH_ANDES_XIP_EX_OP_LOCK
Set a software lock to prevent status register modification.
Definition andes_flash_xip_api_ex.h:63
@ FLASH_ANDES_XIP_MEM_RD_CMD_13
Normal Read with 4-byte address (0x13)
Definition andes_flash_xip_api_ex.h:97
@ FLASH_ANDES_XIP_MEM_RD_CMD_0B
Fast Read (0x0B)
Definition andes_flash_xip_api_ex.h:92
@ FLASH_ANDES_XIP_MEM_RD_CMD_3C
Dual I/O Fast Read with 4-byte address (0x3C)
Definition andes_flash_xip_api_ex.h:99
@ FLASH_ANDES_XIP_MEM_RD_CMD_EC
Quad Output Fast Read with 4-byte address (0xEC)
Definition andes_flash_xip_api_ex.h:102
@ FLASH_ANDES_XIP_MEM_RD_CMD_BC
Dual Output Fast Read with 4-byte address (0xBC)
Definition andes_flash_xip_api_ex.h:101
@ FLASH_ANDES_XIP_MEM_RD_CMD_6B
Quad I/O Fast Read (0x6B)
Definition andes_flash_xip_api_ex.h:94
@ FLASH_ANDES_XIP_MEM_RD_CMD_EB
Quad Output Fast Read (0xEB)
Definition andes_flash_xip_api_ex.h:96
@ FLASH_ANDES_XIP_MEM_RD_CMD_6C
Quad I/O Fast Read with 4-byte address (0x6C)
Definition andes_flash_xip_api_ex.h:100
@ FLASH_ANDES_XIP_MEM_RD_CMD_03
Normal Read (0x03)
Definition andes_flash_xip_api_ex.h:91
@ FLASH_ANDES_XIP_MEM_RD_CMD_3B
Dual I/O Fast Read (0x3B)
Definition andes_flash_xip_api_ex.h:93
@ FLASH_ANDES_XIP_MEM_RD_CMD_BB
Dual Output Fast Read (0xBB)
Definition andes_flash_xip_api_ex.h:95
@ FLASH_ANDES_XIP_MEM_RD_CMD_0C
Fast Read with 4-byte address (0x0C)
Definition andes_flash_xip_api_ex.h:98
#define FLASH_EX_OP_VENDOR_BASE
Definition flash.h:688
__UINT8_TYPE__ uint8_t
Definition stdint.h:88
Output parameters for FLASH_ANDES_XIP_EX_OP_GET_STATUS_REGS operation.
Definition andes_flash_xip_api_ex.h:108
uint8_t regs[3]
Buffer for read status registers.
Definition andes_flash_xip_api_ex.h:110
Input parameters for FLASH_ANDES_XIP_EX_OP_LOCK operation.
Definition andes_flash_xip_api_ex.h:126
bool enable
Set to true to enable the lock, false to disable.
Definition andes_flash_xip_api_ex.h:128
Output parameters for FLASH_ANDES_XIP_EX_OP_LOCK_STATE operation.
Definition andes_flash_xip_api_ex.h:134
bool state
Current lock state.
Definition andes_flash_xip_api_ex.h:136
Input parameters for FLASH_ANDES_XIP_EX_OP_MEM_READ_CMD operation.
Definition andes_flash_xip_api_ex.h:142
enum flash_andes_xip_mem_rd_cmd cmd
SPI command used for memory-mapped mode.
Definition andes_flash_xip_api_ex.h:144
Input parameters for FLASH_ANDES_XIP_EX_OP_SET_STATUS_REGS operation.
Definition andes_flash_xip_api_ex.h:116
uint8_t masks[3]
Mask of status registers to change.
Definition andes_flash_xip_api_ex.h:120
uint8_t regs[3]
Status registers to write.
Definition andes_flash_xip_api_ex.h:118