Zephyr Project API 3.7.0
A Scalable Open Source RTOS
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arcv2_irq_unit.h
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1/* arcv2_irq_unit.h - ARCv2 Interrupt Unit device driver */
2
3/*
4 * Copyright (c) 2014 Wind River Systems, Inc.
5 * Copyright (c) 2020 Synopsys.
6 *
7 * SPDX-License-Identifier: Apache-2.0
8 */
9
10#ifndef ZEPHYR_INCLUDE_ARCH_ARC_V2_ARCV2_IRQ_UNIT_H_
11#define ZEPHYR_INCLUDE_ARCH_ARC_V2_ARCV2_IRQ_UNIT_H_
12
13#ifdef __cplusplus
14extern "C" {
15#endif
16
17/* configuration flags for interrupt unit */
18#define _ARC_V2_INT_PRIO_MASK 0xf
19#define _ARC_V2_INT_DISABLE 0
20#define _ARC_V2_INT_ENABLE 1
21
22#define _ARC_V2_INT_LEVEL 0
23#define _ARC_V2_INT_PULSE 1
24
25#ifndef _ASMLANGUAGE
26
27/*
28 * NOTE:
29 *
30 * All APIs provided by this file are protected with INTERRUPTS LOCKED. The
31 * APIs themselves are writing the IRQ_SELECT, selecting which IRQ's registers
32 * it wants to write to, then write to them: THIS IS NOT AN ATOMIC OPERATION.
33 *
34 * Locking the interrupts inside of the APIs are some kind of self-protection
35 * to guarantee the correctness of operation if the callers don't lock
36 * the interrupt.
37 *
38 */
39
48static ALWAYS_INLINE
49void z_arc_v2_irq_unit_irq_enable_set(
50 int irq,
51 unsigned char enable
52 )
53{
54 unsigned int key = arch_irq_lock();
55
56 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
57 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_ENABLE, enable);
58
60}
61
68static ALWAYS_INLINE
69void z_arc_v2_irq_unit_int_enable(int irq)
70{
71 z_arc_v2_irq_unit_irq_enable_set(irq, _ARC_V2_INT_ENABLE);
72}
73
80static ALWAYS_INLINE
81void z_arc_v2_irq_unit_int_disable(int irq)
82{
83 z_arc_v2_irq_unit_irq_enable_set(irq, _ARC_V2_INT_DISABLE);
84}
85
94static ALWAYS_INLINE
95bool z_arc_v2_irq_unit_int_enabled(int irq)
96{
97 bool ret;
98 unsigned int key = arch_irq_lock();
99
100 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
101 ret = z_arc_v2_aux_reg_read(_ARC_V2_IRQ_ENABLE) & 0x1;
102
104
105 return ret;
106}
107
108
115static ALWAYS_INLINE
116void z_arc_v2_irq_unit_prio_set(int irq, unsigned char prio)
117{
118
119 unsigned int key = arch_irq_lock();
120
121 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
122#if defined(CONFIG_ARC_SECURE_FIRMWARE)
123 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_PRIORITY,
124 (z_arc_v2_aux_reg_read(_ARC_V2_IRQ_PRIORITY) & (~_ARC_V2_INT_PRIO_MASK))
125 | prio);
126#else
127 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_PRIORITY, prio);
128#endif
130}
131
132#if defined(CONFIG_ARC_SECURE_FIRMWARE)
138static ALWAYS_INLINE
139void z_arc_v2_irq_uinit_secure_set(int irq, bool secure)
140{
141 unsigned int key = arch_irq_lock();
142
143 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
144
145 if (secure) {
146 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_PRIORITY,
147 z_arc_v2_aux_reg_read(_ARC_V2_IRQ_PRIORITY) |
148 _ARC_V2_IRQ_PRIORITY_SECURE);
149 } else {
150 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_PRIORITY,
151 z_arc_v2_aux_reg_read(_ARC_V2_IRQ_PRIORITY) &
152 _ARC_V2_INT_PRIO_MASK);
153 }
154
156}
157#endif
158
168static ALWAYS_INLINE
169void z_arc_v2_irq_unit_sensitivity_set(int irq, int s)
170{
171 unsigned int key = arch_irq_lock();
172
173 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
174 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_TRIGGER, s);
175
177}
178
179/*
180 * @brief Check whether processor in interrupt/exception state
181 *
182 * Check whether processor in interrupt/exception state
183 *
184 * @return 1 in interrupt/exception state; 0 not in
185 */
186static ALWAYS_INLINE
187bool z_arc_v2_irq_unit_is_in_isr(void)
188{
189 uint32_t act = z_arc_v2_aux_reg_read(_ARC_V2_AUX_IRQ_ACT);
190
191 /* in exception ?*/
192 if (z_arc_v2_aux_reg_read(_ARC_V2_STATUS32) & _ARC_V2_STATUS32_AE) {
193 return true;
194 }
195
196 return ((act & 0xffff) != 0U);
197}
198
206static ALWAYS_INLINE
207void z_arc_v2_irq_unit_trigger_set(int irq, unsigned int trigger)
208{
209 unsigned int key = arch_irq_lock();
210
211 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
212 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_TRIGGER, trigger);
213
215}
216
225static ALWAYS_INLINE
226unsigned int z_arc_v2_irq_unit_trigger_get(int irq)
227{
228 unsigned int ret;
229 unsigned int key = arch_irq_lock();
230
231 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
232 ret = z_arc_v2_aux_reg_read(_ARC_V2_IRQ_TRIGGER);
233
235
236 return ret;
237}
238
245static ALWAYS_INLINE
246void z_arc_v2_irq_unit_int_eoi(int irq)
247{
248 unsigned int key = arch_irq_lock();
249
250 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_SELECT, irq);
251 z_arc_v2_aux_reg_write(_ARC_V2_IRQ_PULSE_CANCEL, 1);
252
254}
255
256#endif /* _ASMLANGUAGE */
257
258#ifdef __cplusplus
259}
260#endif
261
262#endif /* ZEPHYR_INCLUDE_ARCH_ARC_V2_ARCV2_IRQ_UNIT_H_ */
static ALWAYS_INLINE unsigned int arch_irq_lock(void)
Disable all interrupts on the local CPU.
Definition irq.h:168
static ALWAYS_INLINE void arch_irq_unlock(unsigned int key)
Definition irq.h:176
irp nz macro MOVR cc s mov cc s endm endr irp aw macro LDR aa s
Definition asm-macro-32-bit-gnu.h:17
#define ALWAYS_INLINE
Definition common.h:129
static ZTEST_BMEM int ret
Definition main.c:16
static k_spinlock_key_t key
Definition spinlock_error_case.c:15
__UINT32_TYPE__ uint32_t
Definition stdint.h:90