13#ifndef ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_SILABS_SIWX91X_H_
14#define ZEPHYR_INCLUDE_DRIVERS_CLOCK_CONTROL_SILABS_SIWX91X_H_
APIs and macros for the Zephyr device model.
const struct device * siwx91x_clock_control_get_device(uint32_t clkid)
Get the clock control device that owns clkid.
Clock identifiers for Silicon Labs SiWx91x devices.
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
Runtime device structure (in ROM) per driver instance.
Definition device.h:543
Mux / gate clock configuration for SiWx91x clock managers.
Definition clock_control_silabs_siwx91x.h:27
uint32_t clock_div
Optional divider applied after the mux.
Definition clock_control_silabs_siwx91x.h:30
uint32_t ref_clkid
Parent / reference clock identifier.
Definition clock_control_silabs_siwx91x.h:29
uint32_t clkid
Clock identifier (SIWX91X_CLK_*).
Definition clock_control_silabs_siwx91x.h:28
PLL configuration for SiWx91x HP clock manager.
Definition clock_control_silabs_siwx91x.h:34
uint32_t frequency
Target PLL output frequency, in Hz.
Definition clock_control_silabs_siwx91x.h:37
uint32_t ref_clkid
PLL reference clock identifier.
Definition clock_control_silabs_siwx91x.h:36
uint32_t clkid
PLL clock identifier (SIWX91X_CLK_PLL_*).
Definition clock_control_silabs_siwx91x.h:35