Zephyr Project API 4.2.99
A Scalable Open Source RTOS
Loading...
Searching...
No Matches
cache.h
Go to the documentation of this file.
1/*
2 * Copyright 2021 Carlo Caione <ccaione@baylibre.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
13#ifndef ZEPHYR_INCLUDE_DRIVERS_CACHE_H_
14#define ZEPHYR_INCLUDE_DRIVERS_CACHE_H_
15
16#include <stddef.h>
17
25#ifdef __cplusplus
26extern "C" {
27#endif
28
29#if defined(CONFIG_DCACHE)
30
36void cache_data_enable(void);
37
43void cache_data_disable(void);
44
54int cache_data_flush_all(void);
55
65int cache_data_invd_all(void);
66
77
97int cache_data_flush_range(void *addr, size_t size);
98
119int cache_data_invd_range(void *addr, size_t size);
120
141int cache_data_flush_and_invd_range(void *addr, size_t size);
142
143#if defined(CONFIG_DCACHE_LINE_SIZE_DETECT)
157size_t cache_data_line_size_get(void);
158
159#endif /* CONFIG_DCACHE_LINE_SIZE_DETECT */
160
161#endif /* CONFIG_DCACHE */
162
163#if defined(CONFIG_ICACHE)
164
170void cache_instr_enable(void);
171
177void cache_instr_disable(void);
178
188int cache_instr_flush_all(void);
189
199int cache_instr_invd_all(void);
200
211
231int cache_instr_flush_range(void *addr, size_t size);
232
253int cache_instr_invd_range(void *addr, size_t size);
254
275int cache_instr_flush_and_invd_range(void *addr, size_t size);
276
277#ifdef CONFIG_ICACHE_LINE_SIZE_DETECT
291size_t cache_instr_line_size_get(void);
292
293#endif /* CONFIG_ICACHE_LINE_SIZE_DETECT */
294
295#endif /* CONFIG_ICACHE */
296
297#ifdef __cplusplus
298}
299#endif
300
305#endif /* ZEPHYR_INCLUDE_DRIVERS_CACHE_H_ */
#define cache_instr_invd_all
Definition cache.h:226
#define cache_instr_disable
Definition cache.h:200
#define cache_instr_flush_all
Definition cache.h:213
#define cache_data_flush_and_invd_range(addr, size)
Definition cache.h:156
#define cache_instr_invd_range(addr, size)
Definition cache.h:286
#define cache_instr_flush_and_invd_all
Definition cache.h:239
#define cache_instr_enable
Definition cache.h:191
#define cache_instr_flush_range(addr, size)
Definition cache.h:262
#define cache_data_invd_range(addr, size)
Definition cache.h:131
#define cache_instr_flush_and_invd_range(addr, size)
Definition cache.h:310
#define cache_data_invd_all
Definition cache.h:71
#define cache_data_flush_range(addr, size)
Definition cache.h:107
#define cache_data_flush_and_invd_all
Definition cache.h:84
#define cache_data_flush_all
Definition cache.h:58
#define cache_data_enable
Definition cache.h:36
#define cache_instr_line_size_get
Definition cache.h:331
#define cache_data_disable
Definition cache.h:45
#define cache_data_line_size_get
Definition cache.h:176