esp32c61_clock.h

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/*
 * Copyright (c) 2026 Espressif Systems (Shanghai) Co., Ltd.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

 
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32C61_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32C61_H_
 
/* Supported CPU clock Sources */
#define ESP32_CPU_CLK_SRC_XTAL 0U 
#define ESP32_CPU_CLK_SRC_PLL  1U 
#define ESP32_CLK_SRC_RC_FAST  2U 
 
/* Supported CPU frequencies */
#define ESP32_CLK_CPU_PLL_80M      80000000  
#define ESP32_CLK_CPU_PLL_160M     160000000 
#define ESP32_CLK_CPU_RC_FAST_FREQ 17500000  
 
/* Supported XTAL Frequencies */
#define ESP32_CLK_XTAL_40M 40000000 
 
/* Supported RTC fast clock sources */
#define ESP32_RTC_FAST_CLK_SRC_RC_FAST 0 
#define ESP32_RTC_FAST_CLK_SRC_XTAL_D2 1 
#define ESP32_RTC_FAST_CLK_SRC_XTAL    2 
 
/* Supported RTC slow clock sources */
#define ESP32_RTC_SLOW_CLK_SRC_RC_SLOW  0 
#define ESP32_RTC_SLOW_CLK_SRC_XTAL32K  1 
#define ESP32_RTC_SLOW_CLK_SRC_OSC_SLOW 3 
#define ESP32_RTC_SLOW_CLK_32K_EXT_OSC  9 
 
/* RTC slow clock frequencies */
#define ESP32_RTC_SLOW_CLK_SRC_RC_SLOW_FREQ  136000 
#define ESP32_RTC_SLOW_CLK_SRC_XTAL32K_FREQ  32768  
#define ESP32_RTC_SLOW_CLK_SRC_OSC_SLOW_FREQ 32768  
 
/* Shared module IDs - must match shared_periph_module_t enum in periph_defs.h
 * These are used by the clock control driver to identify peripheral modules.
 */
#define ESP32_TIMG0_MODULE               0 
#define ESP32_TIMG1_MODULE               1 
#define ESP32_SYSTIMER_MODULE            2 
/* Peripherals clock managed by the modem_clock driver must be listed last */
#define ESP32_WIFI_MODULE                3  
#define ESP32_BT_MODULE                  4  
#define ESP32_IEEE802154_MODULE          5  
#define ESP32_COEX_MODULE                6  
#define ESP32_PHY_MODULE                 7  
#define ESP32_ANA_I2C_MASTER_MODULE      8  
#define ESP32_MODEM_ETM_MODULE           9  
#define ESP32_MODEM_ADC_COMMON_FE_MODULE 10 
#define ESP32_PHY_CALIBRATION_MODULE     11 
#define ESP32_MODULE_MAX                 12 
 
/* Non-shared peripherals - these have dedicated clock control in their drivers
 * and don't use periph_module_enable(). Values start at 100.
 */
#define ESP32_LEDC_MODULE         100 
#define ESP32_UART0_MODULE        101 
#define ESP32_UART1_MODULE        102 
#define ESP32_UART2_MODULE        103 
#define ESP32_USB_MODULE          104 
#define ESP32_I2C0_MODULE         105 
#define ESP32_I2S0_MODULE         106 
#define ESP32_SPI_MODULE          107 
#define ESP32_SPI2_MODULE         108 
#define ESP32_RNG_MODULE          109 
#define ESP32_GDMA_MODULE         110 
#define ESP32_ETM_MODULE          111 
#define ESP32_TEMPSENSOR_MODULE   112 
#define ESP32_SARADC_MODULE       113 
#define ESP32_SHA_MODULE          116 
#define ESP32_ECC_MODULE          117 
#define ESP32_SDIO_SLAVE_MODULE   120 
#define ESP32_ASSIST_DEBUG_MODULE 121 
 
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32C61_H_ */