Zephyr Project API 4.3.99
A Scalable Open Source RTOS
Loading...
Searching...
No Matches
esp32c6_clock.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32C6_H_
8#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32C6_H_
9
10/* Supported CPU clock Sources */
11#define ESP32_CPU_CLK_SRC_XTAL 0U
12#define ESP32_CPU_CLK_SRC_PLL 1U
13#define ESP32_CLK_SRC_RC_FAST 2U
14
15/* Supported CPU frequencies */
16#define ESP32_CLK_CPU_PLL_80M 80000000
17#define ESP32_CLK_CPU_PLL_160M 160000000
18#define ESP32_CLK_CPU_RC_FAST_FREQ 17500000
19
20/* Supported XTAL Frequencies */
21#define ESP32_CLK_XTAL_32M 32000000
22#define ESP32_CLK_XTAL_40M 40000000
23
24/* Supported RTC fast clock sources */
25#define ESP32_RTC_FAST_CLK_SRC_RC_FAST 0
26#define ESP32_RTC_FAST_CLK_SRC_XTAL_D2 1
27
28/* Supported RTC slow clock frequencies */
29#define ESP32_RTC_SLOW_CLK_SRC_RC_SLOW 0
30#define ESP32_RTC_SLOW_CLK_SRC_XTAL32K 1
31#define ESP32_RTC_SLOW_CLK_SRC_RC32K 2
32#define ESP32_RTC_SLOW_CLK_32K_EXT_OSC 9
33
34/* RTC slow clock frequencies */
35#define ESP32_RTC_SLOW_CLK_SRC_RC_SLOW_FREQ 136000
36#define ESP32_RTC_SLOW_CLK_SRC_XTAL32K_FREQ 32768
37#define ESP32_RTC_SLOW_CLK_SRC_RC32K_FREQ 32768
38
39/* Shared module IDs - must match shared_periph_module_t enum in periph_defs.h
40 * These are used by the clock control driver to identify peripheral modules.
41 */
42#define ESP32_TIMG0_MODULE 0
43#define ESP32_TIMG1_MODULE 1
44#define ESP32_UHCI0_MODULE 2
45#define ESP32_SYSTIMER_MODULE 3
46/* Peripherals clock managed by the modem_clock driver must be listed last */
47#define ESP32_WIFI_MODULE 4
48#define ESP32_BT_MODULE 5
49#define ESP32_IEEE802154_MODULE 6
50#define ESP32_COEX_MODULE 7
51#define ESP32_PHY_MODULE 8
52#define ESP32_ANA_I2C_MASTER_MODULE 9
53#define ESP32_MODEM_ETM_MODULE 10
54#define ESP32_MODEM_ADC_COMMON_FE_MODULE 11
55#define ESP32_PHY_CALIBRATION_MODULE 12
56#define ESP32_MODULE_MAX 13
57
58/* Non-shared peripherals - these have dedicated clock control in their drivers
59 * and don't use periph_module_enable(). Values start at 100.
60 */
61#define ESP32_LEDC_MODULE 100
62#define ESP32_UART0_MODULE 101
63#define ESP32_UART1_MODULE 102
64#define ESP32_USB_MODULE 103
65#define ESP32_I2C0_MODULE 104
66#define ESP32_I2S1_MODULE 105
67#define ESP32_RMT_MODULE 106
68#define ESP32_PCNT_MODULE 107
69#define ESP32_SPI_MODULE 108
70#define ESP32_SPI2_MODULE 109
71#define ESP32_TWAI0_MODULE 110
72#define ESP32_TWAI1_MODULE 111
73#define ESP32_RNG_MODULE 112
74#define ESP32_GDMA_MODULE 113
75#define ESP32_MCPWM0_MODULE 114
76#define ESP32_ETM_MODULE 115
77#define ESP32_PARLIO_MODULE 116
78#define ESP32_TEMPSENSOR_MODULE 117
79#define ESP32_SARADC_MODULE 118
80#define ESP32_RSA_MODULE 119
81#define ESP32_AES_MODULE 120
82#define ESP32_SHA_MODULE 121
83#define ESP32_ECC_MODULE 122
84#define ESP32_HMAC_MODULE 123
85#define ESP32_DS_MODULE 124
86#define ESP32_SDIO_SLAVE_MODULE 125
87#define ESP32_ASSIST_DEBUG_MODULE 126
88/* LP peripherals */
89#define ESP32_LP_I2C0_MODULE 127
90#define ESP32_LP_UART0_MODULE 128
91
92#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32C6_H_ */