Zephyr Project API
3.7.0
A Scalable Open Source RTOS
Loading...
Searching...
No Matches
esp32c6_clock.h
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
3
*
4
* SPDX-License-Identifier: Apache-2.0
5
*/
6
7
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32C6_H_
8
#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32C6_H_
9
10
/* Supported CPU clock Sources */
11
#define ESP32_CPU_CLK_SRC_XTAL 0U
12
#define ESP32_CPU_CLK_SRC_PLL 1U
13
#define ESP32_CLK_SRC_RC_FAST 2U
14
15
/* Supported CPU frequencies */
16
#define ESP32_CLK_CPU_PLL_80M 80000000
17
#define ESP32_CLK_CPU_PLL_160M 160000000
18
#define ESP32_CLK_CPU_RC_FAST_FREQ 17500000
19
20
/* Supported XTAL Frequencies */
21
#define ESP32_CLK_XTAL_32M 32000000
22
#define ESP32_CLK_XTAL_40M 40000000
23
24
/* Supported RTC fast clock sources */
25
#define ESP32_RTC_FAST_CLK_SRC_RC_FAST 0
26
#define ESP32_RTC_FAST_CLK_SRC_XTAL_D2 1
27
28
/* Supported RTC slow clock frequencies */
29
#define ESP32_RTC_SLOW_CLK_SRC_RC_SLOW 0
30
#define ESP32_RTC_SLOW_CLK_SRC_XTAL32K 1
31
#define ESP32_RTC_SLOW_CLK_SRC_RC32K 2
32
#define ESP32_RTC_SLOW_CLK_32K_EXT_OSC 9
33
34
/* RTC slow clock frequencies */
35
#define ESP32_RTC_SLOW_CLK_SRC_RC_SLOW_FREQ 136000
36
#define ESP32_RTC_SLOW_CLK_SRC_XTAL32K_FREQ 32768
37
#define ESP32_RTC_SLOW_CLK_SRC_RC32K_FREQ 32768
38
39
/* Modules IDs
40
* These IDs are actually offsets in CLK and RST Control registers.
41
* These IDs shouldn't be changed unless there is a Hardware change
42
* from Espressif.
43
*
44
* Basic Modules
45
* Registers: DPORT_PERIP_CLK_EN_REG, DPORT_PERIP_RST_EN_REG
46
*/
47
#define ESP32_LEDC_MODULE 0
48
#define ESP32_UART0_MODULE 1
49
#define ESP32_UART1_MODULE 2
50
#define ESP32_USB_MODULE 3
51
#define ESP32_I2C0_MODULE 4
52
#define ESP32_I2S1_MODULE 5
53
#define ESP32_TIMG0_MODULE 6
54
#define ESP32_TIMG1_MODULE 7
55
#define ESP32_UHCI0_MODULE 8
56
#define ESP32_RMT_MODULE 9
57
#define ESP32_PCNT_MODULE 10
58
#define ESP32_SPI_MODULE 11
59
#define ESP32_SPI2_MODULE 12
60
#define ESP32_TWAI0_MODULE 13
61
#define ESP32_TWAI1_MODULE 14
62
#define ESP32_RNG_MODULE 15
63
#define ESP32_RSA_MODULE 16
64
#define ESP32_AES_MODULE 17
65
#define ESP32_SHA_MODULE 18
66
#define ESP32_ECC_MODULE 19
67
#define ESP32_HMAC_MODULE 20
68
#define ESP32_DS_MODULE 21
69
#define ESP32_SDIO_SLAVE_MODULE 22
70
#define ESP32_GDMA_MODULE 23
71
#define ESP32_MCPWM0_MODULE 24
72
#define ESP32_ETM_MODULE 25
73
#define ESP32_PARLIO_MODULE 26
74
#define ESP32_SYSTIMER_MODULE 27
75
#define ESP32_SARADC_MODULE 28
76
#define ESP32_TEMPSENSOR_MODULE 29
77
#define ESP32_REGDMA_MODULE 30
78
#define ESP32_LP_I2C0_MODULE 31
79
/* Peripherals clock managed by the modem_clock driver must be listed last */
80
#define ESP32_WIFI_MODULE 32
81
#define ESP32_BT_MODULE 33
82
#define ESP32_IEEE802154_MODULE 34
83
#define ESP32_COEX_MODULE 35
84
#define ESP32_PHY_MODULE 36
85
#define ESP32_MODULE_MAX 37
86
87
#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32C6_H_ */
include
zephyr
dt-bindings
clock
esp32c6_clock.h
Generated on Sun Sep 15 2024 17:01:30 for Zephyr Project API by
1.9.8