Zephyr Project API 3.7.0
A Scalable Open Source RTOS
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float_context.h
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1
6/*
7 * Copyright (c) 2011-2014 Wind River Systems, Inc.
8 *
9 * SPDX-License-Identifier: Apache-2.0
10 */
11
12#ifndef _FLOATCONTEXT_H
13#define _FLOATCONTEXT_H
14
15/*
16 * Each architecture must define the following structures (which may be empty):
17 * 'struct fp_volatile_register_set'
18 * 'struct fp_non_volatile_register_set'
19 *
20 * Each architecture must also define the following macros:
21 * SIZEOF_FP_VOLATILE_REGISTER_SET
22 * SIZEOF_FP_NON_VOLATILE_REGISTER_SET
23 * Those macros are used as sizeof(<an empty structure>) is compiler specific;
24 * that is, it may evaluate to a non-zero value.
25 *
26 * Each architecture shall also have custom implementations of:
27 * _load_all_float_registers()
28 * _load_then_store_all_float_registers()
29 * _store_all_float_registers()
30 */
31
32#if defined(CONFIG_X86)
33
34#define FP_OPTION 0
35
36/*
37 * In the future, the struct definitions may need to be refined based on the
38 * specific IA-32 processor, but for now only the Pentium4 is supported:
39 *
40 * 8 x 80 bit floating point registers (ST[0] -> ST[7])
41 * 8 x 128 bit XMM registers (XMM[0] -> XMM[7])
42 *
43 * All these registers are considered volatile across a function invocation.
44 */
45
46struct fp_register {
47 unsigned char reg[10];
48};
49
50struct xmm_register {
51 unsigned char reg[16];
52};
53
54struct fp_volatile_register_set {
55 struct xmm_register xmm[8]; /* XMM[0] -> XMM[7] */
56 struct fp_register st[8]; /* ST[0] -> ST[7] */
57};
58
59struct fp_non_volatile_register_set {
60 /* No non-volatile floating point registers */
61};
62
63#define SIZEOF_FP_VOLATILE_REGISTER_SET sizeof(struct fp_volatile_register_set)
64#define SIZEOF_FP_NON_VOLATILE_REGISTER_SET 0
65
66#elif defined(CONFIG_ARM)
67
68#if defined(CONFIG_VFP_FEATURE_REGS_S64_D32)
69
70struct fp_volatile_register_set {
71 double regs[16]; /* d0..d15 */
72};
73
74struct fp_non_volatile_register_set {
75 double regs[16]; /*d16..d31 */
76};
77
78#elif defined(CONFIG_ARMV7_M_ARMV8_M_FP) || defined(CONFIG_ARMV7_R_FP) \
79 || defined(CONFIG_VFP_FEATURE_REGS_S32_D16)
80
81#define FP_OPTION 0
82
83/*
84 * Registers s0..s15 are volatile and do not
85 * need to be preserved across function calls.
86 */
87struct fp_volatile_register_set {
88 float s[16];
89};
90
91/*
92 * Registers s16..s31 are non-volatile and
93 * need to be preserved across function calls.
94 */
95struct fp_non_volatile_register_set {
96 float s[16];
97};
98
99#endif
100
101#define SIZEOF_FP_VOLATILE_REGISTER_SET \
102 sizeof(struct fp_volatile_register_set)
103#define SIZEOF_FP_NON_VOLATILE_REGISTER_SET \
104 sizeof(struct fp_non_volatile_register_set)
105
106#elif defined(CONFIG_ARM64)
107
108struct fp_volatile_register_set {
109 __int128 regs[16]; /* q0..q15 */
110};
111
112struct fp_non_volatile_register_set {
113 __int128 regs[16]; /* q16..q31 */
114};
115
116#define SIZEOF_FP_VOLATILE_REGISTER_SET \
117 sizeof(struct fp_volatile_register_set)
118#define SIZEOF_FP_NON_VOLATILE_REGISTER_SET \
119 sizeof(struct fp_non_volatile_register_set)
120
121#elif defined(CONFIG_ISA_ARCV2)
122
123struct fp_volatile_register_set {
124#ifdef CONFIG_FP_FPU_DA
125 uint32_t dpfp2h;
126 uint32_t dpfp2l;
127 uint32_t dpfp1h;
128 uint32_t dpfp1l;
129#endif
130};
131
132struct fp_non_volatile_register_set {
133 /* No non-volatile floating point registers */
134};
135
136#define SIZEOF_FP_VOLATILE_REGISTER_SET sizeof(struct fp_volatile_register_set)
137#define SIZEOF_FP_NON_VOLATILE_REGISTER_SET 0
138
139#elif defined(CONFIG_RISCV)
140
141struct fp_volatile_register_set {
142#ifdef CONFIG_CPU_HAS_FPU_DOUBLE_PRECISION
143 uint64_t fp[32];
144#else
145 uint32_t fp[32];
146#endif
147};
148
149struct fp_non_volatile_register_set {
150 /* No non-volatile floating point registers */
151};
152
153#define SIZEOF_FP_VOLATILE_REGISTER_SET sizeof(struct fp_volatile_register_set)
154#define SIZEOF_FP_NON_VOLATILE_REGISTER_SET 0
155
156#elif defined(CONFIG_SPARC)
157
158struct fp_volatile_register_set {
159 double d[16];
160};
161
162struct fp_non_volatile_register_set {
163};
164
165#define SIZEOF_FP_VOLATILE_REGISTER_SET sizeof(struct fp_volatile_register_set)
166#define SIZEOF_FP_NON_VOLATILE_REGISTER_SET 0
167
168#elif defined(CONFIG_XTENSA)
169
170struct fp_volatile_register_set {
171 /* No volatile floating point registers */
172};
173
174struct fp_non_volatile_register_set {
175 uint32_t reg[18]; /* FR register file consists of 18 registers of 32 bits */
176};
177
178#define SIZEOF_FP_VOLATILE_REGISTER_SET 0
179#define SIZEOF_FP_NON_VOLATILE_REGISTER_SET sizeof(struct fp_non_volatile_register_set)
180
181#else
182
183#error "Architecture must provide the following definitions:\n"
184"\t'struct fp_volatile_registers'\n"
185"\t'struct fp_non_volatile_registers'\n"
186"\t'SIZEOF_FP_VOLATILE_REGISTER_SET'\n"
187"\t'SIZEOF_FP_NON_VOLATILE_REGISTER_SET'\n"
188#endif /* CONFIG_X86 */
189
190/* the set of ALL floating point registers */
191
192struct fp_register_set {
193 struct fp_volatile_register_set fp_volatile;
194 struct fp_non_volatile_register_set fp_non_volatile;
195};
196
197#define SIZEOF_FP_REGISTER_SET \
198 (SIZEOF_FP_VOLATILE_REGISTER_SET + SIZEOF_FP_NON_VOLATILE_REGISTER_SET)
199
200/*
201 * The following constants define the initial byte value used by the background
202 * task, and the thread when loading up the floating point registers.
203 */
204
205#define MAIN_FLOAT_REG_CHECK_BYTE ((unsigned char)0xe5)
206#define FIBER_FLOAT_REG_CHECK_BYTE ((unsigned char)0xf9)
207
208#endif /* _FLOATCONTEXT_H */
irp nz macro MOVR cc s mov cc s endm endr irp aw macro LDR aa s
Definition asm-macro-32-bit-gnu.h:17
irp nz macro MOVR cc d
Definition asm-macro-32-bit-gnu.h:11
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINT64_TYPE__ uint64_t
Definition stdint.h:91
Definition float_context.h:192
struct fp_non_volatile_register_set fp_non_volatile
Definition float_context.h:194
struct fp_volatile_register_set fp_volatile
Definition float_context.h:193