13#ifndef ZEPHYR_INCLUDE_DRIVERS_FPGA_H_
14#define ZEPHYR_INCLUDE_DRIVERS_FPGA_H_
83typedef const char *(*fpga_api_get_info)(
const struct device *dev);
156 return api->
reset(dev);
178 return api->
load(dev, image_ptr, img_size);
201#define FPGA_GET_INFO_DEFAULT "n/a"
237 return api->
off(dev);
#define DEVICE_API_GET(_class, _dev)
Expands to the pointer of a device's API for a given class.
Definition device.h:1425
enum FPGA_status(* fpga_api_get_status)(const struct device *dev)
@def_driverbackendgroup{FPGA,fpga_interface}
Definition fpga.h:52
FPGA_status
FPGA programming status.
Definition fpga.h:36
static enum FPGA_status fpga_get_status(const struct device *dev)
Read the status of FPGA.
Definition fpga.h:126
static int fpga_load(const struct device *dev, uint32_t *image_ptr, uint32_t img_size)
Load the bitstream and program the FPGA.
Definition fpga.h:169
const char *(* fpga_api_get_info)(const struct device *dev)
Callback API to return information about the FPGA.
Definition fpga.h:83
int(* fpga_api_reset)(const struct device *dev)
Callback API to reset the FPGA.
Definition fpga.h:65
int(* fpga_api_off)(const struct device *dev)
Callback API to turn the FPGA off.
Definition fpga.h:77
int(* fpga_api_load)(const struct device *dev, uint32_t *image_ptr, uint32_t img_size)
Callback API to load a bitstream and program the FPGA.
Definition fpga.h:58
static int fpga_off(const struct device *dev)
Turns off the FPGA.
Definition fpga.h:229
#define FPGA_GET_INFO_DEFAULT
Default string returned by fpga_get_info() when no info is available.
Definition fpga.h:201
static const char * fpga_get_info(const struct device *dev)
Returns information about the FPGA.
Definition fpga.h:210
static int fpga_on(const struct device *dev)
Turns on the FPGA.
Definition fpga.h:189
static int fpga_reset(const struct device *dev)
Reset the FPGA.
Definition fpga.h:148
int(* fpga_api_on)(const struct device *dev)
Callback API to turn the FPGA on.
Definition fpga.h:71
@ FPGA_STATUS_INACTIVE
FPGA cannot accept a bitstream and will not be programmed correctly.
Definition fpga.h:38
@ FPGA_STATUS_ACTIVE
FPGA can accept a bitstream and can be programmed correctly.
Definition fpga.h:40
#define ENOTSUP
Unsupported value.
Definition errno.h:114
#define NULL
Definition iar_missing_defs.h:20
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
Runtime device structure (in ROM) per driver instance.
Definition device.h:513
@driver_ops{FPGA}
Definition fpga.h:88
fpga_api_on on
@driver_ops_optional Turns on the FPGA.
Definition fpga.h:104
fpga_api_load load
@driver_ops_optional Load the bitstream and program the FPGA.
Definition fpga.h:100
fpga_api_off off
@driver_ops_optional Turns off the FPGA.
Definition fpga.h:108
fpga_api_get_info get_info
@driver_ops_optional Returns information about the FPGA.
Definition fpga.h:112
fpga_api_reset reset
@driver_ops_optional Reset the FPGA.
Definition fpga.h:96
fpga_api_get_status get_status
@driver_ops_optional Read the status of FPGA.
Definition fpga.h:92