Zephyr Project API 3.7.0
A Scalable Open Source RTOS
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Functions | |
static ALWAYS_INLINE void | sys_cache_data_enable (void) |
Enable the d-cache. | |
static ALWAYS_INLINE void | sys_cache_data_disable (void) |
Disable the d-cache. | |
static ALWAYS_INLINE void | sys_cache_instr_enable (void) |
Enable the i-cache. | |
static ALWAYS_INLINE void | sys_cache_instr_disable (void) |
Disable the i-cache. | |
static ALWAYS_INLINE int | sys_cache_data_flush_all (void) |
Flush the d-cache. | |
static ALWAYS_INLINE int | sys_cache_instr_flush_all (void) |
Flush the i-cache. | |
static ALWAYS_INLINE int | sys_cache_data_invd_all (void) |
Invalidate the d-cache. | |
static ALWAYS_INLINE int | sys_cache_instr_invd_all (void) |
Invalidate the i-cache. | |
static ALWAYS_INLINE int | sys_cache_data_flush_and_invd_all (void) |
Flush and Invalidate the d-cache. | |
static ALWAYS_INLINE int | sys_cache_instr_flush_and_invd_all (void) |
Flush and Invalidate the i-cache. | |
int | sys_cache_data_flush_range (void *addr, size_t size) |
Flush an address range in the d-cache. | |
static ALWAYS_INLINE int | sys_cache_instr_flush_range (void *addr, size_t size) |
Flush an address range in the i-cache. | |
int | sys_cache_data_invd_range (void *addr, size_t size) |
Invalidate an address range in the d-cache. | |
static ALWAYS_INLINE int | sys_cache_instr_invd_range (void *addr, size_t size) |
Invalidate an address range in the i-cache. | |
int | sys_cache_data_flush_and_invd_range (void *addr, size_t size) |
Flush and Invalidate an address range in the d-cache. | |
static ALWAYS_INLINE int | sys_cache_instr_flush_and_invd_range (void *addr, size_t size) |
Flush and Invalidate an address range in the i-cache. | |
static ALWAYS_INLINE size_t | sys_cache_data_line_size_get (void) |
Get the d-cache line size. | |
static ALWAYS_INLINE size_t | sys_cache_instr_line_size_get (void) |
Get the i-cache line size. | |
static ALWAYS_INLINE bool | sys_cache_is_ptr_cached (void *ptr) |
Test if a pointer is in cached region. | |
static ALWAYS_INLINE bool | sys_cache_is_ptr_uncached (void *ptr) |
Test if a pointer is in un-cached region. | |
static ALWAYS_INLINE void __sparse_cache * | sys_cache_cached_ptr_get (void *ptr) |
Return cached pointer to a RAM address. | |
static ALWAYS_INLINE void * | sys_cache_uncached_ptr_get (void __sparse_cache *ptr) |
Return uncached pointer to a RAM address. | |
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#include <include/zephyr/cache.h>
Return cached pointer to a RAM address.
This function takes a pointer to any addressable object (either in cacheable memory or not) and returns a pointer that can be used to refer to the same memory through the L1 data cache. Data read through the resulting pointer will reflect locally cached values on the current CPU if they exist, and writes will go first into the cache and be written back later.
ptr | A pointer to a valid C object |
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#include <include/zephyr/cache.h>
Flush the d-cache.
Flush the whole data cache.
0 | If succeeded. |
-ENOTSUP | If not supported. |
-errno | Negative errno for other failures. |
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#include <include/zephyr/cache.h>
Flush and Invalidate the d-cache.
Flush and Invalidate the whole data cache.
0 | If succeeded. |
-ENOTSUP | If not supported. |
-errno | Negative errno for other failures. |
int sys_cache_data_flush_and_invd_range | ( | void * | addr, |
size_t | size | ||
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#include <include/zephyr/cache.h>
Flush and Invalidate an address range in the d-cache.
Flush and Invalidate the specified address range of the data cache.
addr
or a padded size
is not strictly necessary.addr | Starting address to flush and invalidate. |
size | Range size. |
0 | If succeeded. |
-ENOTSUP | If not supported. |
-errno | Negative errno for other failures. |
int sys_cache_data_flush_range | ( | void * | addr, |
size_t | size | ||
) |
#include <include/zephyr/cache.h>
Flush an address range in the d-cache.
Flush the specified address range of the data cache.
addr
or a padded size
is not strictly necessary.addr | Starting address to flush. |
size | Range size. |
0 | If succeeded. |
-ENOTSUP | If not supported. |
-errno | Negative errno for other failures. |
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#include <include/zephyr/cache.h>
Invalidate the d-cache.
Invalidate the whole data cache.
0 | If succeeded. |
-ENOTSUP | If not supported. |
-errno | Negative errno for other failures. |
int sys_cache_data_invd_range | ( | void * | addr, |
size_t | size | ||
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#include <include/zephyr/cache.h>
Invalidate an address range in the d-cache.
Invalidate the specified address range of the data cache.
addr
is not aligned to the cache line and/or size
is not a multiple of the cache line size the behaviour is undefined.addr | Starting address to invalidate. |
size | Range size. |
0 | If succeeded. |
-ENOTSUP | If not supported. |
-errno | Negative errno for other failures. |
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#include <include/zephyr/cache.h>
Get the d-cache line size.
The API is provided to get the data cache line.
The cache line size is calculated (in order of priority):
CONFIG_DCACHE_LINE_SIZE_DETECT
is set.CONFIG_DCACHE_LINE_SIZE
.d-cache-line-size
CPU0 property of the DT.size | Size of the d-cache line. |
0 | If the d-cache is not enabled. |
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#include <include/zephyr/cache.h>
Flush the i-cache.
Flush the whole instruction cache.
0 | If succeeded. |
-ENOTSUP | If not supported. |
-errno | Negative errno for other failures. |
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#include <include/zephyr/cache.h>
Flush and Invalidate the i-cache.
Flush and Invalidate the whole instruction cache.
0 | If succeeded. |
-ENOTSUP | If not supported. |
-errno | Negative errno for other failures. |
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#include <include/zephyr/cache.h>
Flush and Invalidate an address range in the i-cache.
Flush and Invalidate the specified address range of the instruction cache.
addr
or a padded size
is not strictly necessary.addr | Starting address to flush and invalidate. |
size | Range size. |
0 | If succeeded. |
-ENOTSUP | If not supported. |
-errno | Negative errno for other failures. |
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#include <include/zephyr/cache.h>
Flush an address range in the i-cache.
Flush the specified address range of the instruction cache.
addr
or a padded size
is not strictly necessary.addr | Starting address to flush. |
size | Range size. |
0 | If succeeded. |
-ENOTSUP | If not supported. |
-errno | Negative errno for other failures. |
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#include <include/zephyr/cache.h>
Invalidate the i-cache.
Invalidate the whole instruction cache.
0 | If succeeded. |
-ENOTSUP | If not supported. |
-errno | Negative errno for other failures. |
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#include <include/zephyr/cache.h>
Invalidate an address range in the i-cache.
Invalidate the specified address range of the instruction cache.
addr
is not aligned to the cache line and/or size
is not a multiple of the cache line size the behaviour is undefined.addr | Starting address to invalidate. |
size | Range size. |
0 | If succeeded. |
-ENOTSUP | If not supported. |
-errno | Negative errno for other failures. |
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#include <include/zephyr/cache.h>
Get the i-cache line size.
The API is provided to get the instruction cache line.
The cache line size is calculated (in order of priority):
CONFIG_ICACHE_LINE_SIZE_DETECT
is set.CONFIG_ICACHE_LINE_SIZE
.i-cache-line-size
CPU0 property of the DT.size | Size of the d-cache line. |
0 | If the d-cache is not enabled. |
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#include <include/zephyr/cache.h>
Test if a pointer is in cached region.
Some hardware may map the same physical memory twice so that it can be seen in both (incoherent) cached mappings and a coherent "shared" area. This tests if a particular pointer is within the cached, coherent area.
ptr | Pointer |
True | if pointer is in cached region. |
False | if pointer is not in cached region. |
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#include <include/zephyr/cache.h>
Test if a pointer is in un-cached region.
Some hardware may map the same physical memory twice so that it can be seen in both (incoherent) cached mappings and a coherent "shared" area. This tests if a particular pointer is within the un-cached, incoherent area.
ptr | Pointer |
True | if pointer is not in cached region. |
False | if pointer is in cached region. |
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#include <include/zephyr/cache.h>
Return uncached pointer to a RAM address.
This function takes a pointer to any addressable object (either in cacheable memory or not) and returns a pointer that can be used to refer to the same memory while bypassing the L1 data cache. Data in the L1 cache will not be inspected nor modified by the access.
ptr | A pointer to a valid C object |