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Zephyr Project API 4.4.99
A Scalable Open Source RTOS
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Files | |
| file | memory-attr-arm.h |
| ARM MPU memory attribute DT binding definitions (legacy). | |
Macros | |
| #define | DT_MEM_ARM_GET(x) |
| Extract ARM MPU-specific bits from a full zephyr,memory-attr value. | |
| #define | DT_MEM_ARM_MPU_RAM DT_MEM_ARM(ATTR_MPU_RAM) |
| Standard cacheable RAM region. | |
| #define | DT_MEM_ARM_MPU_RAM_NOCACHE DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) |
| Non-cacheable RAM region. | |
| #define | DT_MEM_ARM_MPU_FLASH DT_MEM_ARM(ATTR_MPU_FLASH) |
| Flash (ROM) memory region. | |
| #define | DT_MEM_ARM_MPU_PPB DT_MEM_ARM(ATTR_MPU_PPB) |
| Private Peripheral Bus region. | |
| #define | DT_MEM_ARM_MPU_IO DT_MEM_ARM(ATTR_MPU_IO) |
| I/O (peripheral) memory region. | |
| #define | DT_MEM_ARM_MPU_EXTMEM DT_MEM_ARM(ATTR_MPU_EXTMEM) |
| External memory region. | |
| #define | DT_MEM_ARM_MPU_RAM_PXN DT_MEM_ARM(ATTR_MPU_RAM_PXN) |
| RAM region with Privileged Execute Never attribute. | |
| #define | DT_MEM_ARM_MPU_DEVICE DT_MEM_ARM(ATTR_MPU_DEVICE) |
| Device memory region. | |
| #define | DT_MEM_ARM_MPU_RAM_WT DT_MEM_ARM(ATTR_MPU_RAM_WT) |
| Write-through cacheable RAM region. | |
| #define | DT_MEM_ARM_MPU_UNKNOWN DT_MEM_ARCH_ATTR_UNKNOWN |
| Unknown or unsupported ARM MPU memory type. | |
| #define DT_MEM_ARM_GET | ( | x | ) |
#include <memory-attr-arm.h>
Extract ARM MPU-specific bits from a full zephyr,memory-attr value.
| x | Value to extract ARM MPU-specific memory attribute bits from. |
| #define DT_MEM_ARM_MPU_DEVICE DT_MEM_ARM(ATTR_MPU_DEVICE) |
#include <memory-attr-arm.h>
Device memory region.
| #define DT_MEM_ARM_MPU_EXTMEM DT_MEM_ARM(ATTR_MPU_EXTMEM) |
#include <memory-attr-arm.h>
External memory region.
| #define DT_MEM_ARM_MPU_FLASH DT_MEM_ARM(ATTR_MPU_FLASH) |
#include <memory-attr-arm.h>
Flash (ROM) memory region.
| #define DT_MEM_ARM_MPU_IO DT_MEM_ARM(ATTR_MPU_IO) |
#include <memory-attr-arm.h>
I/O (peripheral) memory region.
| #define DT_MEM_ARM_MPU_PPB DT_MEM_ARM(ATTR_MPU_PPB) |
#include <memory-attr-arm.h>
Private Peripheral Bus region.
| #define DT_MEM_ARM_MPU_RAM DT_MEM_ARM(ATTR_MPU_RAM) |
#include <memory-attr-arm.h>
Standard cacheable RAM region.
| #define DT_MEM_ARM_MPU_RAM_NOCACHE DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) |
#include <memory-attr-arm.h>
Non-cacheable RAM region.
| #define DT_MEM_ARM_MPU_RAM_PXN DT_MEM_ARM(ATTR_MPU_RAM_PXN) |
#include <memory-attr-arm.h>
RAM region with Privileged Execute Never attribute.
| #define DT_MEM_ARM_MPU_RAM_WT DT_MEM_ARM(ATTR_MPU_RAM_WT) |
#include <memory-attr-arm.h>
Write-through cacheable RAM region.
| #define DT_MEM_ARM_MPU_UNKNOWN DT_MEM_ARCH_ATTR_UNKNOWN |
#include <memory-attr-arm.h>
Unknown or unsupported ARM MPU memory type.