Zephyr Project API 3.7.0
A Scalable Open Source RTOS
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imx8qm-pinctrl.h
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1/*
2 * Copyright 2023 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_IMX8QM_PINCTRL_H_
8#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_IMX8QM_PINCTRL_H_
9
10/* values for pad field */
11#define SC_P_UART0_RTS_B 23
12#define SC_P_UART0_CTS_B 24
13#define SC_P_SAI1_RXD 128
14#define SC_P_SAI1_TXC 130
15#define SC_P_SAI1_TXD 131
16#define SC_P_SAI1_TXFS 132
17
18/* mux values */
19#define IMX8QM_DMA_LPUART2_RX_UART0_RTS_B 2 /* UART0_RTS_B ---> DMA_LPUART2_RX */
20#define IMX8QM_DMA_LPUART2_TX_UART0_CTS_B 2 /* DMA_LPUART2_TX ---> UART0_CTS_B */
21#define IMX8QM_AUD_SAI1_RXD_SAI1_RXD 0 /* AUD_SAI1_RXD <--- SAI1_RXD */
22#define IMX8QM_AUD_SAI1_TXC_SAI1_TXC 0 /* AUD_SAI1_TXC <---> SAI1_TXC */
23#define IMX8QM_AUD_SAI1_TXD_SAI1_TXD 0 /* AUD_SAI1_TXD ---> SAI1_TXD */
24#define IMX8QM_AUD_SAI1_TXFS_SAI1_TXFS 0 /* AUD_SAI1_TXFS <---> SAI1_TXFS */
25
26#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_IMX8QM_PINCTRL_H_ */